| Error Message |
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| FRU/Action in Sequence |
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| No beep, power indicator turns on, the LCD | Reconnect the |
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| screen is blank, but you can view POST |
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| when connected to an external CRT. |
| Inverter board |
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| LCD panel |
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| System board |
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| No beep, power indicator turns on and a |
| Ensure every internal cables are properly and securely |
| ||
| blinking cursor appears on screen during |
| connected. |
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| |
| POST. |
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| System board |
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| No beep during POST but system runs |
| Speaker |
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| |
| correctly. |
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| System board |
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POST Beep Codes |
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| Code |
| Beeps | POST Routine Description |
| |
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| 02h |
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| Verify Real Mode |
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| 03h |
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| Disable |
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| 04h |
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| Get CPU type |
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| 06h |
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| Initialize system hardware |
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| 08h |
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| Initialize chipset with initial POST values |
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| 09h |
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| Set IN POST flag |
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| 0Ah |
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| Initialize CPU registers |
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| 0Bh |
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| Enable CPU cache |
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| 0Ch |
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| Initialize caches to initial POST values |
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| 0Eh |
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| Initialize I/O component |
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| 0Fh |
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| Initialize the local bus IDE |
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| 10h |
|
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| Initialize Power Management |
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| 11h |
|
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| Load alternate registers with initial POST |
|
|
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|
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| values |
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| 12h |
|
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| Restore CPU control word during warm |
|
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| boot |
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| 13h |
|
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| Initialize PCI Bus Mastering devices |
|
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| 14h |
|
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| Initialize keyboard controller |
|
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| 16h |
|
| BIOS ROM checksum |
| |
|
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| 17h |
|
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| Initialize cache before memory autosize |
|
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| 18h |
|
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| 8254 timer initialization |
|
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| 1Ah |
|
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| 8237 DMA controller initialization |
|
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| 1Ch |
|
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| Reset Programmable Interrupt Controller |
|
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| 20h |
|
| Test DRAM refresh |
| |
|
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| 22h |
|
| Test 8742 Keyboard Controller |
| |
|
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| 24h |
|
|
| Set ES segment register to 4 GB |
|
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| 26h |
|
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| Enable A20 line |
|
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| 28h |
|
|
| Autosize DRAM |
|
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| 29h |
|
|
| Initialize POST Memory Manager |
|
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| 2Ah |
|
|
| Clear 215 KB base RAM |
|
|
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| 2Ch |
|
| RAM failure on address line xxxx |
| |
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|
70 | Chapter 1 |