Advantech PCM-3780 manual Register Format, Table C.1 Register Offset Address Table

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C.2.1 Register Format

Table C.1: Register Offset Address Table

Base

PCM-3780 Register Format

Address +

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

HEX

00h

W

Counter 0 Mode Register

CM

CM

CM1

CM1

CM1

CM1

CM

CM

CM

CM

CM

CM

CM

CM

CM

CM

15

14

3

2

1

0

9

8

7

6

5

4

3

2

1

0

R

N/A

02h

W

Counter 0 Load Register

CL

CL1

CL13

CL12

CL11

CL10

CL9

CL8

CL

CL

CL

CL

CL

CL

CL

CL

15

14

7

6

5

4

3

2

1

0

R

N/A

04h

W

Counter 0 Hold Register

CH

CH1

CH1

CH1

CH1

CH1

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

15

14

3

2

1

0

9

8

7

6

5

4

3

2

1

0

R

N/A

06h

W

Counter 0 Command Register

C2

C1

C0

R

N/A

08h

W

Counter 1 Mode Register

CM

CM

CM1

CM1

CM1

CM1

CM

CM

CM

CM

CM

CM

CM

CM

CM

CM

15

14

3

2

1

0

9

8

7

6

5

4

3

2

1

0

R

N/A

A0h

W

Counter 1 Load Register

CL

CL1

CL13

CL12

CL11

CL10

CL9

CL8

CL

CL

CL

CL

CL

CL

CL

CL

15

14

7

6

5

4

3

2

1

0

R

N/A

C0h

W

Counter 1 Hold Register

CH

CH1

CH1

CH1

CH1

CH1

CH

CH

CH

CH

CH

CH

CH

CH

CH

CH

15

14

3

2

1

0

9

8

7

6

5

4

3

2

1

0

R

N/A

E0h

W

Counter 1 Command Register

C2

C1

C0

R

N/A

20h

W

Counter Command Enable Register

CE

CE

1

0

R

N/A

33

AppendixC

Image 41

Contents PCM-3780 Ch Counter/Timer with Ch TTL DIO ModuleCopyright Acknowledgements Two Years Product Warranty CE Notification FCC Class a Technical Support and Assistance Packing List Page Contents Appendix Specifications Introduction Features Counter Modes PCM-3780 Counter ModePCM-3780 Counter Mode Applications Installation GuideInstallation Flow Chart Device Drivers on the companion CD-ROM Software OverviewDevice Drivers Register-level ProgrammingProgramming Tools Device Drivers Programming RoadmapProgramming with Device Drivers Function Library Troubleshooting Device Drivers ErrorWiring Boards AccessoriesWiring Cables Hardware Installation Unpacking Companion CD-ROM Driver InstallationDifferent Options for Driver Setup Installing the Module Hardware InstallationPage Pin Assignments & Jumper Settings Overview Signal ConnectionsInterrupt Level IRQ Setting JP1 Switch and Jumper SettingsBase Address Setting Base Address Setting SW1CN4 Counter Interface Connector Connectors Pin AssignmentCN3 I/O Port Connector Reference Direction Description Connector Signal DescriptionPeriod Measurement Using Advantech 32-bit DLL DriverUsing Direct I/O Frequency Measurement Frequency MeasurementSpecifications Digital Input/Output Programmable CounterGeneral Page Block Diagram Appendix B Block Diagram Register Structure & Format I/O Port Address Map Appendix C Register Structure & FormatTable C.1 Register Offset Address Table Register FormatCE CE CM2 Output Enable Control Counter 0/1 Mode RegisterCM1 to CM0 Output Control CM6 to CM3 Count Control CM6CM13 to CM12 Gate Source Selection CM7 Count Source EdgeCM14 Gating Polarity Selection CM15 Gate Active Edge or LevelCounter 0/1 Hold Register Counter 0/1 Load RegisterCounter Command Enable Register Counter 0/1 Command RegisterC2 to C0 Command Code CE1 to CE0 Counter Command Enable BitInterrupt Status Register Interrupt Control RegisterDirection Control Register Interrupt Clear RegisterPort A/B/C Interrupt Status Register O Direction Control BitDV3 to DV0 Fout Divider Divide by 1 to 16 0000 = Divide by Fout RegisterFS2 to FS0 Fout Source FOE Fout Output EnableWaveform of Each Mode Counter Mode Descriptions Appendix D Waveform of Each ModeTable D.1 PCM-3780 Counter Mode Table D.2 PCM-3780 Counter Mode Software-Triggered Strobe with No Hardware Gating Mode a WaveformsSoftware-Triggered Strobe with Level Gating Mode B WaveformsHardware-Triggered Strobe Mode C WaveformsRate Generator with No Hardware Gating Mode D WaveformsRate Generator with Level Gating Mode E WaveformsNon-Retriggerable One-Shot Mode F WaveformsSoftware-Triggered Delayed Pulse One-Shot Mode G WaveformsMode H Waveforms Hardware-Triggered Delayed Pulse Strobe Mode I WaveformsVariable Duty Cycle Rate Generator with No Hardware Gating Mode J WaveformsVariable Duty Cycle Rate Generator with Level Gating Mode K WaveformsHardware-Triggered Delayed Pulse One-Shot Mode L WaveformsHardware-Triggered Strobe with Edge Disarm Mode O WaveformsNon-Retriggerbale One-Shot with Edge Disarm Mode R WaveformsHardware-Triggered Delayed Pulse Strobe with Edge Disarm Mode U WaveformsHardware-Triggered Delayed Pulse One-Shot with Edge Disarm Mode X Waveforms