Advantech PCM-3780 manual Counter 0/1 Command Register, Counter Command Enable Register

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C.6 Counter 0/1 Command Register

Base		PCM-3780 Register Format
Address +		15 14 13 12 11 10 9 8 7 6 5 4 3 2	1	0
HEX
6h	W	Counter 0 Command Register
		C2	C1	C0
	R	Counter 0 Command Register
Eh	W	Counter 1 Command Register
		C2	C1	C0

RCounter 1 Command Register

1.C2 to C0 : Command Code

000= Disarm counter

001= Load counter from LOAD

010= Disarm and Save counter

100= Arm counter

101= Load and Arm counter

110= Save counter to HOLD

111= Reset counter

C.7 Counter Command Enable Register

Base	PCM-3780 Register Format
Address	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
+ HEX
20h W	Counter Command Enable Register														CE1	CE0
															CE1	CE0

RCounter Command Enable Register

1.CE1 to CE0: Counter Command Enable Bit

0= Not Select this counter

1= Select this counter

PCM-3780 User Manual

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Contents Ch Counter/Timer with Ch TTL DIO Module PCM-3780Copyright Acknowledgements Two Years Product Warranty CE Notification FCC Class a Technical Support and Assistance Packing List Page Contents Appendix Specifications Introduction Features PCM-3780 Counter Mode Counter ModesPCM-3780 Counter Mode Installation Guide ApplicationsInstallation Flow Chart Device Drivers Software OverviewDevice Drivers on the companion CD-ROM Register-level ProgrammingDevice Drivers Programming Roadmap Programming ToolsTroubleshooting Device Drivers Error Programming with Device Drivers Function LibraryWiring Cables AccessoriesWiring Boards Hardware Installation Unpacking Driver Installation Companion CD-ROMDifferent Options for Driver Setup Hardware Installation Installing the ModulePage Pin Assignments & Jumper Settings Signal Connections OverviewSwitch and Jumper Settings Interrupt Level IRQ Setting JP1Base Address Setting SW1 Base Address SettingCN3 I/O Port Connector Connectors Pin AssignmentCN4 Counter Interface Connector Connector Signal Description Reference Direction DescriptionUsing Direct I/O Using Advantech 32-bit DLL DriverPeriod Measurement Frequency Measurement Frequency MeasurementSpecifications Programmable Counter Digital Input/OutputGeneral Page Block Diagram Appendix B Block Diagram Register Structure & Format Appendix C Register Structure & Format I/O Port Address MapRegister Format Table C.1 Register Offset Address TableCE CE CM1 to CM0 Output Control Counter 0/1 Mode RegisterCM2 Output Enable Control CM6 to CM3 Count Control CM6CM14 Gating Polarity Selection CM7 Count Source EdgeCM13 to CM12 Gate Source Selection CM15 Gate Active Edge or LevelCounter 0/1 Load Register Counter 0/1 Hold RegisterC2 to C0 Command Code Counter 0/1 Command RegisterCounter Command Enable Register CE1 to CE0 Counter Command Enable BitInterrupt Control Register Interrupt Status RegisterPort A/B/C Interrupt Status Register Interrupt Clear RegisterDirection Control Register O Direction Control BitFout Register DV3 to DV0 Fout Divider Divide by 1 to 16 0000 = Divide byFOE Fout Output Enable FS2 to FS0 Fout SourceWaveform of Each Mode Appendix D Waveform of Each Mode Counter Mode DescriptionsTable D.1 PCM-3780 Counter Mode Table D.2 PCM-3780 Counter Mode Mode a Waveforms Software-Triggered Strobe with No Hardware GatingMode B Waveforms Software-Triggered Strobe with Level GatingMode C Waveforms Hardware-Triggered StrobeMode D Waveforms Rate Generator with No Hardware GatingMode E Waveforms Rate Generator with Level GatingMode F Waveforms Non-Retriggerable One-ShotMode G Waveforms Software-Triggered Delayed Pulse One-ShotMode H Waveforms Mode I Waveforms Hardware-Triggered Delayed Pulse StrobeMode J Waveforms Variable Duty Cycle Rate Generator with No Hardware GatingMode K Waveforms Variable Duty Cycle Rate Generator with Level GatingMode L Waveforms Hardware-Triggered Delayed Pulse One-ShotMode O Waveforms Hardware-Triggered Strobe with Edge DisarmMode R Waveforms Non-Retriggerbale One-Shot with Edge DisarmMode U Waveforms Hardware-Triggered Delayed Pulse Strobe with Edge DisarmMode X Waveforms Hardware-Triggered Delayed Pulse One-Shot with Edge Disarm