HCD-PX333
Pin No. | Pin Name | I/O |
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44 |
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| O | Column address strobe signal output to the | ||||
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45 |
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| A09 | O | Address signal output to the |
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46 |
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| O | Row address strobe signal output to the | “L” active | ||||
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47 |
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| O | Write enable signal output to the | “L” active | |||||
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48 |
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| D1 | I/O |
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49 |
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| D0 | I/O |
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50 |
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51 |
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| D3 | I/O |
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52 |
| MVCI | I (S) | Digital in PLL oscillation input from the external VCO | Not used (fixed at “L”) | ||||||
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53 |
| ASYO | O | Playback EFM |
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54 |
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| ASYI | I (A) | Playback EFM asymmetry comparator voltage input terminal | ||||||
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55 | AVDD | — | Power supply terminal (+3.3V) (analog system) |
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56 |
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| BIAS | I (A) | Playback EFM asymmetry circuit constant current input terminal | ||||||
57 |
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| RFI | I (A) | Playback EFM RF signal input from the CXA2523AR (IC101) | ||||||
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58 |
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| AVSS | — | Ground terminal (analog system) |
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59 |
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| PCO | O (3) | Phase comparison output for master clock of the recording/playback EFM master PLL | ||||||
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60 |
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| FILI | I (A) | Filter input for master clock of the recording/playback master PLL | ||||||
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61 |
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| FILO | O (A) | Filter output for master clock of the recording/playback master PLL | ||||||
62 |
| CLTV | I (A) | Internal VCO control voltage input of the recording/playback master PLL | |||||||
63 |
| PEAK | I (A) | Light amount signal (RF/ABCD) peak hold input from the CXA2523AR (IC101) | |||||||
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64 | BOTM | I (A) | Light amount signal (RF/ABCD) bottom hold input from the CXA2523AR (IC101) | ||||||||
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65 | ABCD | I (A) | Light amount signal (ABCD) input from the CXA2523AR (IC101) | ||||||||
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66 |
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| FE | I (A) | Focus error signal input from the CXA2523AR (IC101) |
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67 |
| AUX1 | I (A) | Auxiliary signal (I3 signal/temperature signal) input from the CXA2523AR (IC101) | |||||||
68 |
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| VC | I (A) | Middle point voltage (+1.65V) input from the CXA2523AR (IC101) | ||||||
69 |
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| ADIO | O (A) | Monitor output of the A/D converter input signal | Not used (open) | |||||
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70 | AVDD | — | Power supply terminal (+3.3V) (analog system) |
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71 |
| ADRT | I (A) | A/D converter operational range upper limit voltage input terminal (fixed at “H” in this set) | |||||||
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72 | ADRB | I (A) | A/D converter operational range lower limit voltage input terminal (fixed at “L” in this set) | ||||||||
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73 |
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| AVSS | — | Ground terminal (analog system) |
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74 |
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| SE | I (A) | Sled error signal input from the CXA2523AR (IC101) |
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75 |
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| TE | I (A) | Tracking error signal input from the CXA2523AR (IC101) | ||||||
76 | DCHG | I (A) | Connected to the +3.3V power supply |
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77 | TEST4 | I | Input terminal for the test | Not used (fixed at “H”) |
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78 |
| ADFG | I (S) | ADIP duplex FM signal (22.05 kHz ± 1 kHz) input from the CXA2523AR (IC101) | |||||||
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79 | F0CNT | O | Filter f0 control signal output to the CXA2523AR (IC101) | ||||||||
80 |
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| XLRF | O | Serial data latch pulse signal output to the CXA2523AR (IC101) | ||||||
81 |
| CKRF | O | Serial data transfer clock signal output to the CXA2523AR (IC101) | |||||||
82 |
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| DTRF | O | Writing serial data output to the CXA2523AR (IC101) |
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83 | APCREF | O | Control signal output to the reference voltage generator circuit for the laser automatic power | ||||||||
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84 | TEST0 | O | Input terminal for the test | Not used (open) |
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85 |
| TRDR | O | Tracking servo drive PWM signal | |||||||
86 |
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| TFDR | O | Tracking servo drive PWM signal (+) output to the BH6511FS (IC141) | ||||||
87 | DVDD | — | Power supply terminal (+3.3V) (digital system) |
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88 |
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| FFDR | O | Focus servo drive PWM signal (+) output to the BH6511FS (IC141) | ||||||
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* I (S) stands for schmitt input, I (A) for analog input, O (3) for
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