Sony HCD-PX333 LVL1, LVL0, Darst, Slicersel, Ld-Low, Ldin, Mod, Byte, Cnvss, Cin, Reset, VSS0

Page 85

HCD-PX333

MD DIGITAL BOARD IC1001 M30805MG-205GP (MD MECHANISM CONTROLLER)

Pin No.

Pin Name

 

I/O

 

 

 

 

 

 

 

 

 

 

 

 

 

Description

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1, 2

 

 

 

O

Not used (open)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3

 

LVL1

 

O

L-ch level output terminal Not used (open)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4

 

LVL0

 

O

R-ch level output terminal

Not used (open)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

5 to 7

 

 

 

O

Not used (open)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

8

 

 

 

 

O

Muting control signal output to the D/A converter (IC1006) “L”: muting

 

 

MUTE

 

 

9

DARST

 

O

Reset signal output to the D/A converter (IC1006)

“H”: reset

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

10

SLICERSEL

 

O

IEC958 input selection signal output to the D/A converter (IC1006) “L”: MD, “H”: CD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

11

LD-LOW

 

O

Loading motor drive voltage control signal output for the loading motor driver (IC1004)

 

“H” active

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

12

 

LDIN

 

O

Motor control signal output to the loading motor driver (IC1004)

“L” active

*1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

13

LDOUT

 

O

Motor control signal output to the loading motor driver (IC1004)

“L” active

*1

 

 

 

 

 

 

 

 

 

Laser modulation select signal output to the HF module switch circuit

 

 

 

 

 

 

 

 

 

 

Stop: “L”, Playback power: “H”,

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Recording power:

 

 

 

 

 

 

 

 

 

 

14

 

MOD

 

O

 

 

 

 

 

 

 

 

 

 

 

 

 

0.5 sec

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2 sec

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

15

 

BYTE

 

I

External data bus line byte selection signal input

“L”: 16 bit, “H”: 8 bit (fixed at “L”)

16

CNVSS

 

I

Mode setting terminal “L ”: single-chip mode (fixed at “L ”)

 

 

17

 

X-CIN

 

I

Sub system clock input terminal

Not used (open)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

18

X-COUT

 

O

Sub system clock output terminal

Not used (open)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

System reset signal input from the reset signal generator (IC931)

“L”: reset

 

19

 

RESET

 

I

 

 

 

For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

20

 

XOUT

 

O

Main system clock output terminal (10 MHz)

 

 

 

21

 

VSS0

 

Ground terminal

 

 

 

 

 

 

 

 

 

 

 

 

 

 

22

 

 

XIN

 

I

Main system clock input terminal (10 MHz)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

23

 

VCC0

 

Power supply terminal (+3.3V)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

24

 

 

 

 

 

I

Non-maskable interrupt input terminal “L” active (fixed at “H” in this set)

 

 

 

NMI

 

 

 

 

25

 

DQSY

 

I

Digital In U-bit CD format subcode Q sync (SCOR) input from the CXD2662R (IC151)

 

 

“L” is input every 13.3 msec

 

 

Almost all, “H” is input

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

26

P.DOWN

 

I

Power down detection signal input from the system controller (IC501)

 

 

“L”: power down, normally: “H”

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

27

 

SQSY

 

I

Subcode Q sync (SCOR) input from the CXD2662R (IC151)

 

 

 

 

“L” is input every 13.3 msec

 

 

Almost all, “H” is input

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

28

 

 

NC

 

O

Not used (open)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

29

 

LDON

 

O

Laser diode on/off control signal output to the automatic power control circuit

“H”: laser on

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

30

LIMIT-IN

 

I

Detection input from the sled limit-in detect switch (S101)

 

 

 

The optical pick-up is inner position when “L”

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

*1 Loading motor (M103) control

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Mode

LOADING

 

 

EJECT

 

 

 

BRAKE

 

RUN IDLE

 

 

Terminal

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LDIN (pin qs)

 

“L”

 

“H”

 

 

 

 

 

“L”

 

“H”

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LDOUT (pin qd)

 

“H”

 

“L”

 

 

 

 

 

“L”

 

“H”

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

85

Image 85
Contents MDM-7X2A SpecificationsMD Section HCD-PX333 SELF-DIAGNOSIS FunctionHCD-PX333 Items of Error History Mode Items and ContentsError Code Details of Error Table of Error CodesCD Section Electrical Adjustments Table of ContentsDiagrams Model IdentificationHCD-PX333 Section Servicing Notes Cleaning Objective Lens of Optical PICK-UPFor CD For MDService Position IOP JIG for Checking BD MD Board WaveformRecord Procedure When Memory NG is DisplayedCriteria for Determination Measure if unsatisfactory Checks Prior to Parts Replacement and Adjustments in MDSpecified Value Bit Binary Retry Cause Display Mode in MDHigher Bits Lower Bits Hexa Details Decimal Bit When BinaryHexadecimal Binary CD aging mode sequence CD Aging ModeChecking Method CD-TEXT Test DiscRestrictions in CD-TEXT Display CD-TEXT Test Disc Recorded Contents and Display Section General HCD-PX333 Parts IdentificationRemote Control This set can be disassembled in the order shown below HCD-PX333 Section DisassemblyFront Panel Section CaseREC BOARD, VOL Board Jack BOARD, BL BOARD, Panel BOARD, LCDBack PANEL, SP BOARD, Tuner TRANSFORMER, Power and DC FANAMP Board Main BOARD, Power BoardOver Write Head HR901, BD MD Board MD Mechanism Deck MDM-7X2ALoading Motor Assy M103 Holder AssyOptical PICK-UP KMS-262 Sled Motor Assy M102CD Mechanism Deck CDM55A-21BD53 Spindle Motor Assy M101Holder BU Assy MD Digital BoardTray CDM, Loading Board Base Unit BU-21BD53, Holder 55-BU21CAM CDM55 HCD-PX333 Section Test Mode Setting the Test Mode MD Seciton Precautions for USE of Test ModeReleasing the Test Mode Basic Operations of the Test ModeCheck Selecting the Test ModeFunctions of Other Buttons Operating the Continuous Playback ModeMID OUTMeanings of Other Displays Test Mode DisplaysInformation Automatic SELF-DIAGNOSIS FunctionParts Replacement and Adjustment HCD-PX333 Section Electrical AdjustmentsCheck before replacement YES Adjustment flowPrecautions for USE of Optical PICK- UP KMS-262A/262E Precautions for Checking Laser Diode EmissionPrecautions for Adjustments Laser power meterTemperature Compensation Offset Check Using the Continuously Recorded DiscLaser Power Check Checks Prior to RepairsOther Checks Auto CheckTraverse Check CD Error Rate Check Play Check MO Error Rate CheckFocus Bias Check Self-Recording/playback CheckTemperature Compensation Offset Adjustment Initial Setting of Adjustment ValueLaser Power Adjustment Recording and Displaying the IOP InformationIop NV Save Traverse AdjustmentEnter Focus Bias AdjustmentYES R Auto Gain Control Output Level Adjustment Error Rate CheckCD Auto Gain Control Output Level Adjustment MO Auto Gain Control Output Level AdjustmentAdjustment and checking Loacation RF Level Check Curve CheckBalance Check BD CD Board Conductor Side Memo Block Diagrams HCD-PX333 Section DiagramsMD Servo Section Optical A/D Converter SectionFAN Main SectionST/CD+10V DISPLAY, Power Supply SectionAUS Circuit Boards LocationSide B Schematic Diagram BD CD Board Location Printed Wiring Board BD MD BoardSemiconductor 5959 IC B/D Printed Wiring Board MD Digital Section Schematic Diagram MD Digital /3 See page 79 for IC Block Diagrams See page 79 for IC Block Diagrams Semiconductor Location IC B/D HCD-PX333 Printed Wiring Board SP Board Printed Wiring Board AMP BoardSchematic Diagram AMP Board Schematic Diagram SP Board IC602 Printed Wiring Board PanelSchematic Diagram Panel See page 55 for Circuit Boards Location 7474 Schematic Diagram Power Board BD CD Board BD MD Board WaveformsMD Digital Board Main Board I2SLRCKOUTIC101 CXA2523AR BD MD Board IC Block DiagramsIC141 BH6519FS-E2 BD MD Board IC1005 uDA1360TS MD Digital Board IC931 M62016L Main Board IC PIN Function Description BD MD Board IC151 CXD2662R XWE XcasMvci AsyoFS4 FrdrSrdr SfdrLVL1 ResetLVL0 DarstWR-PWR XeltI2CCLK VCC1VSS3 VCC3VCC4 VSS4Drvdat Reset XT1Drvclk CLKLOD POS IN-SWLOD NEG CLP POSMain Board IC501 ∝PDSS3033AYGF-M18-3BA System Controller GC Power MD/CD PowerTR Relay KBD CHKSircs PC PowerRDS CLK Self WriteREC Board Section Exploded Views58 A-4476-550-A Panel BOARD, Complete LCD601 1-804-371-11 Indicator TUBE, Liquid CrystalChassis 163 152 151154 162 153 156 161 163314 310 309 319 311 305 313308 303357 355 354 352 359365 370 353 366353 369 360 356 359510 505 508 511 504 CD Mechanism Deck Section CDM55A-21BD53506 512 513 522 501 517 514 518 516 502 519 520 515 521HCD-PX333 Section AMP Electrical Parts List TANTAL. Chip HCD-PX333 BD MDElect Chip Diode F1J6TPJack Jack HCD-PX333 Loading Main HCD-PX333 Main AEP,UK MY,SP,HK,AUSHCD-PX333 Main MD Digital CONNECTOR, FFC 31PMD Digital BOARD, Complete Capacitor MD Digital Panel HCD-PX333 Panel Power HCD-PX333 Power REC HCD-PX333 VOL 111 HCD-PX333 Revision History