Sony Official Manual and Specifications for the HCD-C5 Stereo System
Page 70

HCD-C5

Pin No.

Pin Name

I/O

 

Description

 

 

 

 

 

 

 

48

D1

I/O

 

 

 

 

 

 

 

 

 

49

D0

I/O

Two-way data bus with the D-RAM (IC152)

 

 

 

 

 

50

D2

I/O

 

 

 

 

 

 

 

 

 

 

51

D3

I/O

 

 

 

 

 

 

 

 

52

MVCI

I (S)

Digital in PLL oscillation input from the external VCO

Not used (fixed at “L”)

 

 

 

 

 

53

ASYO

O

Playback EFM full-swing output terminal

 

 

 

 

 

54

ASYI

I (A)

Playback EFM asymmetry comparator voltage input terminal

 

 

 

 

 

55

AVDD

—

Power supply terminal (+3.3V) (analog system)

 

 

 

 

 

56

BIAS

I (A)

Playback EFM asymmetry circuit constant current input terminal

 

 

 

 

57

RFI

I (A)

Playback EFM RF signal input from the CXA2523AR (IC101)

 

 

 

 

 

58

AVSS

—

Ground terminal (analog system)

 

 

 

 

 

59

PCO

O (3)

Phase comparison output for master clock of the recording/playback EFM master PLL

 

 

 

 

60

FILI

I (A)

Filter input for master clock of the recording/playback master PLL

 

 

 

 

61

FILO

O (A)

Filter output for master clock of the recording/playback master PLL

 

 

 

 

62

CLTV

I (A)

Internal VCO control voltage input of the recording/playback master PLL

 

 

 

 

63

PEAK

I (A)

Light amount signal (RF/ABCD) peak hold input from the CXA2523AR (IC101)

 

 

 

 

64

BOTM

I (A)

Light amount signal (RF/ABCD) bottom hold input from the CXA2523AR (IC101)

 

 

 

 

65

ABCD

I (A)

Light amount signal (ABCD) input from the CXA2523AR (IC101)

 

 

 

 

 

66

FE

I (A)

Focus error signal input from the CXA2523AR (IC101)

 

 

 

 

 

67

AUX1

I (A)

Auxiliary signal (I3 signal/temperature signal) input from the CXA2523AR (IC101)

 

 

 

 

68

VC

I (A)

Middle point voltage (+1.65V) input from the CXA2523AR (IC101)

 

 

 

 

69

ADIO

O (A)

Monitor output of the A/D converter input signal Not used (open)

 

 

 

 

 

70

AVDD

—

Power supply terminal (+3.3V) (analog system)

 

 

 

 

 

71

ADRT

I (A)

A/D converter operational range upper limit voltage input terminal (fixed at “H” in this set)

 

 

 

 

72

ADRB

I (A)

A/D converter operational range lower limit voltage input terminal (fixed at “L” in this set)

 

 

 

 

 

73

AVSS

—

Ground terminal (analog system)

 

 

 

 

 

 

74

SE

I (A)

Sled error signal input from the CXA2523AR (IC101)

 

 

 

 

 

75

TE

I (A)

Tracking error signal input from the CXA2523AR (IC101)

 

 

 

 

 

76

DCHG

I (A)

Connected to the +3.3V power supply

 

 

 

 

 

 

 

77

TEST4

I

nput terminal for the test

Not used (fixed at “H”)

 

 

 

 

 

78

ADFG

I (S)

ADIP duplex FM signal (22.05 kHz ± 1 kHz) input from the CXA2523AR (IC101)

 

 

 

 

79

F0CNT

O

Filter f0 control signal output to the CXA2523AR (IC101)

 

 

 

 

80

XLRF

O

Serial data latch pulse signal output to the CXA2523AR (IC101)

 

 

 

 

81

CKRF

O

Serial data transfer clock signal output to the CXA2523AR (IC101)

 

 

 

 

 

82

DTRF

O

Writing serial data output to the CXA2523AR (IC101)

 

 

 

 

 

83

APCREF

O

Control signal output to the reference voltage generator circuit for the laser automatic power

control

 

 

 

 

 

 

 

 

 

 

 

 

 

84

TEST0

O

Input terminal for the test

Not used (open)

 

 

 

 

 

85

TRDR

O

Tracking servo drive PWM signal (–) output to the BH6511FS (IC141)

 

 

 

 

86

TFDR

O

Tracking servo drive PWM signal (+) output to the BH6511FS (IC141)

 

 

 

 

 

87

DVDD

—

Power supply terminal (+3.3V) (digital system)

 

 

 

 

 

88

FFDR

O

Focus servo drive PWM signal (+) output to the BH6511FS (IC141)

 

 

 

 

89

FRDR

O

Focus servo drive PWM signal (–) output to the BH6511FS (IC141)

 

 

 

 

 

90

FS4

O

Clock signal (176.4 kHz) output terminal (X’tal system)

Not used (open)

 

 

 

 

91

SRDR

O

Sled servo drive PWM signal (–) output to the BH6511FS (IC141)

 

 

 

 

92

SFDR

O

Sled servo drive PWM signal (+) output to the BH6511FS (IC141)

 

 

 

 

93

SPRD

O

Spindle servo drive PWM signal (–) output to the BH6511FS (IC141)

 

 

 

 

 

 

* I (S) stands for schmitt input, I (A) for analog input, O (3) for 3-state output, and O (A) for analog output in the column I/O.

70

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Page 69 Page 71
Contents OPTIMA-720L1E SpecificationsTT Base Assy MDM-7B4MHCD-C5 SELF-DIAGNOSIS FunctionDiagrams Table of ContentsElectrical Adjustments Exploded Views Electrical Parts ListFlexible Circuit Board Repairing HCD-C5 Section Servicing NoteService Position of the CD Mechanism Deck Service Position of the MD Mechanism DeckJIG for Checking BD MD Board Waveform IOPSection General Parts IdentificationRemote control Parts IdentificationHCD-C5 Section Disassembly SET Bottom PLATE, CaseBottom PLATE, Case Panel BoardCD Mechanism Deck TN-CCD1001Z, BD CD Board CN1Connector Board Front Bracket SECTION, Loading Motor Assy M902 SW Board Feed Motor Assy M903 Rear Damper BracketOptical PICK-UP OPTIMA-720L1E Base Section Spindle Motor Assy M904 Jack BOARD, HP BOARD, Rear CoverUcom BOARD, AMP Power Board Tuner PACK, D. C. FAN M901Audio BOARD, Power BOARD, Power Transformer T900 Connector CN105MD Mechanism Deck MDM-7B4M, MD Digital Board Holder AssyBD MD Board Loading Motor M703, Spindle Motor M701, Sled Motor M702Over Write Head OP-SUB SectionHCD-C5 Section Test Mode Releasing the Test Mode Precautions for USE of Test ModeSetting the Test Mode MD SecitonSelecting the Test Mode Basic Operations of the Test ModeENTER/YES R Operating the Continuous Playback Mode Automatic SELF-DIAGNOSIS Function Functions of Other ButtonsInformation Record Procedure When Memory NG is DisplayedDisplay Precedure Criteria for Determination Measure if unsatisfactory Checks Prior to Parts Replacement and Adjustments in MDRetry Cause Display Mode in MD PrecedureReading the Display Reading the Retry Cause DisplayExample Bit When Binary DetailsCD Section Section Electrical Adjustments HCD-C5RF Level Check Check before replacement Parts Replacement and AdjustmentMD Section Adjustment flow YESPrecautions for Adjustments Precautions for Checking Laser Diode EmissionPrecautions for USE of Optical PICK-UP KMS-260B/260E Laser power meterLaser Power Check Using the Continuously Recorded DiscTemperature Compensation Offset Check Checks Prior to RepairsOther Checks Auto CheckTraverse Check Play Check Focus Bias CheckSelf-Recording/playback Check Laser Power Adjustment Initial Setting of Adjustment ValueTemperature Compensation Offset Adjustment Recording and Displaying the IOP InformationMethod of identifying the optical pick-up KMS-260B/260E Traverse AdjustmentIop NV Save Read power traverse adjustment CD Error Rate Check Focus Bias AdjustmentError Rate Check MO Error Rate CheckMO Auto Gain Control Output Level Adjustment Auto Gain Control Output Level AdjustmentCD Auto Gain Control Output Level Adjustment Adjustment and checking LoacationWaveforms Section Diagrams HCD-C5Circuit Boards Location AUSBlock Diagram CD Servo Section OPTIMA-720L1EBlock Diagram MD Servo Section APCBlock Diagram Main Section Tape MD-LLocation SemiconductorIC B/D Location Side a Location Side BIC B/D 153 IC201 10K 1/16W Printed Wiring Board Ucom Board Semiconductor LocationDigital Optical Input Speaker IC302 D301 1SS355TE IC602 HCD-C5 IC901 Schematic Diagram Power Section IC101 CXD3068Q BD CD Board IC103 CXA2581N-T4 BD CD Board IC Block DiagramsIC102 BA5982FP-E2 BD CD Board IC201 ∝ DA1360TS MD Digital Board IC141 BH6519FS-E2 BD MD BoardVssd Selstatic TEST1 Reset Bcko Vddd CRtcb Vddd PREEM0 NC NC TEST2 Vssd C L3DATAIC601 M66004M8FP-200D Panel Board IC PIN Function Description IC101Xrst SrdtSens SqsyAvdd AsyoAsyi BiasTEST1 SpfdTEST2 TEST3 Dvss IC701 PLAY-SW ResetDA-RESET REC-SWIC501 Bvdd SPK-RELAYHelp BvssSection Exploded Views Overall SectionFront Panel Section 110 Chassis102 104 111 103 112 114 105 101 106 107 108 113152 155 154156 157 151 158 155 A-4725-732-A MD Digital BOARD, CompleteCD Mechanism Deck Section TN-CCD1001Z CD Mechanism Deck Secti Front Bracket Section TN-CCD1001Z CD Mechanism Deck Section Base Section TN-CCD1001Z CD Mechanism Deck Section Chassis Section TN-CCD1001Z MD Mechanism Deck MDM-7B4M 758 761 757 756 751 761760 762 763 764 759 753754 755 752AMP Audio Section Electrical Parts List Audio HCD-C5 BD CDDiode UDZ-TE-17-3.9B Ferrite Bead CONNECTOR, FFC 29PHCD-C5 BD CD FerriteBD CD HCD-C5 BD MD HCD-C5 BD MD BD MD Connector Jack HCD-C5 MD DigitalFerrite 0UH HCD-C5 MD Digital PanelFerrite Bead / Conductor InductorPanel Power Power Ucom Connector DIN 8P CONNECTOR, FFC 16PCONNECTOR, Round Type 6P PIN, Connector 4P DiodeR225 216-841-11 TRANSFORMER, Power AEP,UK,AUS Wire Flat Type 19 CoreSwitch Detection Limit Hardware ListHCD-C5 Revision History
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