Sony HCD-C5 Srdt, Sens, Xrst, Sqsy, Dqsy, Recp, Osci, Osco, Xtsl, Lrcki, Dvdd, Dvss, Xoe, Xcas

Page 69

HCD-C5

•IC151 CXD2662R

(DIGITAL SIGNAL PROCESSOR, EFM/ACIRC ENCODER/DECODER, SHOCK PROOF MEMORY CONTROLLER, ATRAC ENCODER/DECODER) (BD (MD) BOARD)

Pin No.

Pin Name

I/O

 

Description

 

 

 

 

 

 

1

MNT0 (FOK)

O

Focus OK signal output terminal “H” is output when focus is on (“L”: NG) Not used (open)

 

 

 

 

2

MNT1 (SHCK)

O

Track jump detection signal output to the MD mechanism controller (IC1001)

 

 

 

 

3

MNT2 (XBUSY)

O

Busy monitor signal output to the MD mechanism controller (IC1001)

 

 

 

 

4

MNT3 (SLOC)

O

Spindle servo lock status monitor signal output to the MD mechanism controller (IC1001) (open)

 

 

 

 

5

SWDT

I

Writing serial data signal input from the MD mechanism controller (IC1001)

 

 

 

 

6

SCLK

I (S)

Serial data transfer clock signal input from the MD mechanism controller (IC1001)

 

 

 

 

7

XLAT

I (S)

Serial data latch pulse signal input from the MD mechanism controller (IC1001)

 

 

 

 

8

SRDT

O (3)

Reading serial data signal output to the MD mechanism controller (IC1001)

 

 

 

 

9

SENS

O (3)

Internal status (SENSE) output to the MD mechanism controller (IC1001)

 

 

 

 

10

XRST

I (S)

Reset signal input from the MD mechanism controller (IC1001) “L”: reset

 

 

 

 

11

SQSY

O

Subcode Q sync (SCOR) output to the MD mechanism controller (IC1001)

“L” is output every 13.3 msec

Almost all, “H” is output

 

 

 

 

 

 

 

 

 

 

 

12

DQSY

O

Digital In U-bit CD format subcode Q sync (SCOR) output to the MD mechanism controller

(IC1001) “L” is output every 13.3 msec Almost all, “H” is output

 

 

 

 

 

 

 

13

RECP

I

Laser power selection signal input from the MD mechanism controller (IC1001)

“L”: playback mode, “H”: recording mode

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

14

XINT

O

Interrupt status output to the MD mechanism controller (IC1001)

 

 

 

 

15

TX

O

Magnetic head on/off signal output to the over write head drive (IC181)

 

 

 

 

 

 

 

16

OSCI

I

System clock signal (90.3168 MHz) input terminal

 

 

 

 

 

 

 

 

17

OSCO

O

System clock signal (512Fs=90.3168 MHz) output terminal

Not used (open)

 

 

 

 

 

 

 

18

XTSL

I

Input terminal for the system clock frequency setting

 

 

 

“L”: 45.1584 MHz, “H”: 90.3168 MHz (fixed at “H” in this set)

 

 

 

 

 

 

 

 

19

DIN0

I

Digital audio signal input terminal when recording mode

Not used

 

 

 

 

 

 

20

DIN1

I

Digital audio signal input terminal when recording mode

 

 

 

 

 

 

 

 

21

DOUT

O

Digital audio signal output terminal when playback mode

 

 

 

 

 

 

 

 

22

DATI

I

Recording data input from the A/D converter (IC1005)

 

 

 

 

 

 

23

LRCKI

I

L/R sampling clock signal (44.1 kHz) input from the D/A converter (IC1006), A/D converter

(IC1005)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

24

XBCKI

I

Bit clock signal (2.8224 MHz) input from the D/A converter (IC1006), A/D converter (IC1005)

 

 

 

 

 

 

 

25

ADDT

I

Recording data input terminal

Not used (fixed at “L”)

 

 

 

 

 

 

 

 

 

 

26

DADT

O

Playback data output terminal

Not used (open)

 

 

 

 

 

 

 

 

27

LRCK

O

L/R sampling clock signal (44.1 kHz) output terminal

Not used (open)

 

 

 

 

 

28

XBCK

O

Bit clock signal (2.8224 MHz) output terminal

Not used (open)

 

 

 

 

 

29

FS256

O

Clock signal (11.2896 MHz) output terminal

Not used (open)

 

 

 

 

 

 

 

30

DVDD

—

Power supply terminal (+3.3V) (digital system)

 

 

 

 

 

 

 

 

 

 

 

31 to 34

A03 to A00

O

Address signal output to the D-RAM (IC152)

 

 

 

 

 

 

 

 

 

 

 

35

A10

O

Address signal output to the D-RAM (IC152) (open)

 

 

 

 

 

 

 

 

 

 

 

36 to 40

A04 to A08

O

Address signal output to the D-RAM (IC152)

 

 

 

 

 

 

 

 

 

41

A11

O

Address signal output to the external D-RAM

Not used (open)

 

 

 

 

 

 

 

 

42

DVSS

—

Ground terminal (digital system)

 

 

 

 

 

 

 

 

 

43

XOE

O

Output enable signal output to the D-RAM (IC152)

“L” active

 

 

 

 

 

44

XCAS

O

Column address strobe signal output to the D-RAM (IC152)

“L” active

 

 

 

 

 

 

 

 

45

A09

O

Address signal output to the D-RAM (IC152)

 

 

 

 

 

 

 

 

 

46

XRAS

O

Row address strobe signal output to the D-RAM (IC152)

“L” active

 

 

 

 

47

XWE

O

Write enable signal output to the D-RAM (IC152) “L” active

 

 

 

 

 

 

 

 

 

* I (S) stands for schmitt input, I (A) for analog input, O (3) for 3-state output, and O (A) for analog output in the column I/O.

69

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Contents TT Base Assy SpecificationsOPTIMA-720L1E MDM-7B4MSELF-DIAGNOSIS Function HCD-C5Electrical Adjustments Table of ContentsDiagrams Exploded Views Electrical Parts ListHCD-C5 Section Servicing Note Flexible Circuit Board RepairingService Position of the MD Mechanism Deck Service Position of the CD Mechanism DeckIOP JIG for Checking BD MD Board WaveformParts Identification Section GeneralParts Identification Remote controlSET Bottom PLATE, Case HCD-C5 Section DisassemblyPanel Board Bottom PLATE, CaseCN1 CD Mechanism Deck TN-CCD1001Z, BD CD BoardConnector Board Front Bracket SECTION, Loading Motor Assy M902 SW Board Rear Damper Bracket Feed Motor Assy M903Optical PICK-UP OPTIMA-720L1E Base Section Jack BOARD, HP BOARD, Rear Cover Spindle Motor Assy M904Tuner PACK, D. C. FAN M901 Ucom BOARD, AMP Power BoardConnector CN105 Audio BOARD, Power BOARD, Power Transformer T900Holder Assy MD Mechanism Deck MDM-7B4M, MD Digital BoardLoading Motor M703, Spindle Motor M701, Sled Motor M702 BD MD BoardOP-SUB Section Over Write HeadHCD-C5 Section Test Mode Setting the Test Mode Precautions for USE of Test ModeReleasing the Test Mode MD SecitonBasic Operations of the Test Mode Selecting the Test ModeENTER/YES R Operating the Continuous Playback Mode Functions of Other Buttons Automatic SELF-DIAGNOSIS FunctionInformation When Memory NG is Displayed Record ProcedureDisplay Precedure Retry Cause Display Mode in MD Checks Prior to Parts Replacement and Adjustments in MDCriteria for Determination Measure if unsatisfactory PrecedureReading the Retry Cause Display Reading the DisplayExample Details Bit When BinarySection Electrical Adjustments HCD-C5 CD SectionRF Level Check Parts Replacement and Adjustment Check before replacementMD Section YES Adjustment flowPrecautions for USE of Optical PICK-UP KMS-260B/260E Precautions for Checking Laser Diode EmissionPrecautions for Adjustments Laser power meterTemperature Compensation Offset Check Using the Continuously Recorded DiscLaser Power Check Checks Prior to RepairsAuto Check Other ChecksTraverse Check Focus Bias Check Play CheckSelf-Recording/playback Check Temperature Compensation Offset Adjustment Initial Setting of Adjustment ValueLaser Power Adjustment Recording and Displaying the IOP InformationTraverse Adjustment Method of identifying the optical pick-up KMS-260B/260EIop NV Save Read power traverse adjustment Error Rate Check Focus Bias AdjustmentCD Error Rate Check MO Error Rate CheckCD Auto Gain Control Output Level Adjustment Auto Gain Control Output Level AdjustmentMO Auto Gain Control Output Level Adjustment Adjustment and checking LoacationCircuit Boards Location Section Diagrams HCD-C5Waveforms AUSOPTIMA-720L1E Block Diagram CD Servo SectionAPC Block Diagram MD Servo SectionTape MD-L Block Diagram Main SectionSemiconductor LocationIC B/D Location Side B Location Side aIC B/D 153 IC201 10K 1/16W Semiconductor Location Printed Wiring Board Ucom BoardDigital Optical Input Speaker IC302 D301 1SS355TE IC602 HCD-C5 IC901 Schematic Diagram Power Section IC Block Diagrams IC101 CXD3068Q BD CD Board IC103 CXA2581N-T4 BD CD BoardIC102 BA5982FP-E2 BD CD Board IC141 BH6519FS-E2 BD MD Board IC201 ∝ DA1360TS MD Digital BoardRtcb Vddd PREEM0 NC NC TEST2 Selstatic TEST1 Reset Bcko Vddd CVssd Vssd C L3DATAIC601 M66004M8FP-200D Panel Board IC101 IC PIN Function DescriptionSens SrdtXrst SqsyAsyi AsyoAvdd BiasSpfd TEST1TEST2 TEST3 Dvss IC701 DA-RESET ResetPLAY-SW REC-SWIC501 Help SPK-RELAYBvdd BvssOverall Section Section Exploded ViewsFront Panel Section 102 104 111 103 112 114 105 101 106 107 108 Chassis110 113156 157 151 158 155 154152 155 A-4725-732-A MD Digital BOARD, CompleteCD Mechanism Deck Section TN-CCD1001Z CD Mechanism Deck Secti Front Bracket Section TN-CCD1001Z CD Mechanism Deck Section Base Section TN-CCD1001Z CD Mechanism Deck Section Chassis Section TN-CCD1001Z MD Mechanism Deck MDM-7B4M 760 762 763 764 759 761758 761 757 756 751 753754 755 752AMP Audio Section Electrical Parts List BD CD Audio HCD-C5HCD-C5 BD CD CONNECTOR, FFC 29PDiode UDZ-TE-17-3.9B Ferrite Bead FerriteBD CD HCD-C5 BD MD HCD-C5 BD MD MD Digital BD MD Connector Jack HCD-C5Ferrite Bead / Conductor HCD-C5 MD Digital PanelFerrite 0UH InductorPanel Power Power Ucom CONNECTOR, Round Type 6P CONNECTOR, FFC 16PConnector DIN 8P PIN, Connector 4P DiodeR225 216-841-11 Switch Detection Limit Wire Flat Type 19 CoreTRANSFORMER, Power AEP,UK,AUS Hardware ListHCD-C5 Revision History
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