Transcend Information CF 266X dimensions ¾ Card Drive Address Register Address 3F7h377h Offset Fh

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TS2G~8GCF266

266X CompactFlash Card

¾Card (Drive) Address Register (Address 3F7h[377h]; Offset Fh)

This register is provided for compatibility with the AT disk drive interface. It is recommended that this register not be mapped into the host’s I/O space because of potential conflicts on Bit 7.

Bit 7: this bit is unknown.

Implementation Note:

Conflicts may occur on the host data bus when this bit is provided by a Floppy Disk Controller operating at the same addresses as the CompactFlash Storage Card. Following are some possible solutions to this problem for the PCMCIA implementation:

1)Locate the CompactFlash Storage Card at a non-conflicting address, i.e. Secondary address (377) or in an independently decoded Address Space when a Floppy Disk Controller is located at the Primary addresses.

2)Do not install a Floppy and a CompactFlash Storage Card in the system at the same time.

3)Implement a socket adapter that can be programmed to (conditionally) tri-state D7 of I/0 address 3F7h/377h when a CompactFlash Storage Card is installed and conversely to tristate D6-D0 of I/O address 3F7h/377h when a floppy controller is installed.

4)Do not use the CompactFlash Storage Card’s Drive Address register. This may be accomplished by either a) If possible, program the host adapter to enable only I/O addresses 1F0h-1F7h, 3F6h (or 170h-177h, 176h) to the CompactFlash Storage Card or b) if provided use an additional Primary / Secondary configuration in the CompactFlash Storage Card which does not respond to accesses to I/O locations 3F7h and 377h. With either of these implementations, the host software shall not attempt to use information in the Drive Address Register.

Bit 6 (-WTG): this bit is 0 when a write operation is in progress; otherwise, it is 1.

Bit 5 (-HS3): this bit is the negation of bit 3 in the Drive/Head register.

Bit 4 (-HS2): this bit is the negation of bit 2 in the Drive/Head register.

Bit 3 (-HS1): this bit is the negation of bit 1 in the Drive/Head register.

Bit 2 (-HS0): this bit is the negation of bit 0 in the Drive/Head register.

Bit 1 (-nDS1): this bit is 0 when drive 1 is active and selected.

Bit 0 (-nDS0): this bit is 0 when the drive 0 is active and selected.

Transcend Information Inc.

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Contents Description Placement FeaturesDimensions 266X CompactFlash CardTranscend Block Diagram Pin Assignments and Pin Type TS2G~8GCF266 Signal Description TS2G~8GCF266 TS2G~8GCF266 TS2G~8GCF266 TS2G~8GCF266 Electrical Specification „ Output Drive Type „ Output Drive Characteristics „ Signal Interface „ Additional Requirements for CF Advanced Timing Modes Table Typical Series Termination for Ultra DMA 266X CompactFlash Card„ Ultra DMA Electrical Requirements ¾ Series termination required for Ultra DMA operation¾ Ultra DMA Mode Cabling Requirement „ Attribute Memory Read Timing Specification TS2G~8GCF266 „ Common Memory Read Timing Specification „ Common Memory Write Timing Specification „ I/O Input Read Timing Specification TS2G~8GCF266 „ I/O Output Write Timing Specification TS2G~8GCF266 „ True IDE PIO Mode Read/Write Timing Specification TS2G~8GCF266 Table Ultra DMA Data Burst Timing „ True IDE Ultra DMA Mode Read/Write Timing Specification266X CompactFlash Card TS2G~8GCF266 TS2G~8GCF266 TS2G~8GCF266 Card Configuration „ Single Function CF+ Cards„ Multiple Function CF+ Cards TS2G~8GCF266 Attribute Memory Function „ Attribute Memory FunctionTS2G~8GCF266 TS2G~8GCF266 „ Pin Replacement Register Base + 04h in Attribute Memory „ Socket and Copy Register Base + 06h in Attribute Memory Transfer Function Table Pcmcia Mode I/O FunctionTable Common Memory Function Common Memory Transfer FunctionTrue IDE Mode I/O Transfer Function Metaformat Overview CF-ATA Drive Register Set Definition and Protocol Table Primary and Secondary I/O Decoding „ I/O Primary and Secondary Address ConfigurationsTable Contiguous I/O Decoding „ Contiguous I/O Mapped Addressing„ Memory Mapped Addressing „ True IDE Mode Addressing¾ Data Register Address 1F0h170hOffset 0,8,9 „ CF-ATA Registers ¾ Drive/Head LBA 27-24 Register Address 1F6h176h Offset ¾ Sector Count Register Address 1F2h172h Offset ¾ Sector Number LBA 7-0 Register Address 1F3h173h Offset ¾ Cylinder High LBA 23-16 Register Address 1F5h175h OffsetTS2G~8GCF266 ¾ Device Control Register Address 3F6h376h Offset Eh ¾ Card Drive Address Register Address 3F7h377h Offset Fh CF-ATA Command Set „ Check Power Mode 98h or E5h „ Erase Sectors C0h „ Execute Drive Diagnostic 90h„ Format Track 50h „ Flush Cache E7h„ Identify Device Ech 266X CompactFlash Card ¾ Word 0 General Configuration ¾ Word 49 Capabilities Bit 13 Standby Timer ¾ Word 1 Default Number of Cylinders¾ Word 3 Default Number of Heads ¾ Word 6 Default Number of Sectors per Track¾ Current Number of Cylinders, Heads, Sectors/Track ¾ Multiple Sector Setting¾ Total Sectors Addressable in LBA Mode ¾ Translation Parameters Valid¾ Word 68 Minimum PIO transfer cycle time with Iordy ¾ Words 82-84 Features/command sets supported¾ Word 65 Minimum Multiword DMA transfer cycle time ¾ Recommended Multiword DMA transfer cycle time¾ Words 85-87 Features/command sets enabled ¾ Word 89 Time required for Security erase unit completion ¾ Word 88 Ultra DMA Modes Supported and SelectedAdditional Requirements for CF Advanced Timing Modes ¾ Word 91 Advanced power management level value¾ Word 160 Power Requirement Description ¾ Word 128 Security Status Bit 8 Security LevelTS2G~8GCF266 „ Idle 97h or E3h „ Idle Immediate 95h or E1h „ Initialize Drive Parameters 91h„ NOP 00h „ Read DMA C8h „ Read Long Sector 22h or 23h „ Read Buffer E4hTS2G~8GCF266 „ Recalibrate 1Xh „ Request Sense 03h „ Seek 7Xh „ Set Features EFh Feature Supported 266X CompactFlash Card Translate Sector Information „ Standby Immediate 94h or E0h „ Translate Sector 87h„ Wear Level F5h „ Write Buffer E8h „ Write DMA CAh TS2G~8GCF266 TS2G~8GCF266 „ Error Posting TS2G~8GCF266