• IC300 M30805SGP (MAIN BOARD)
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1 |
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| DATA(FL) | O | Serial data signal output to the display driver |
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2 |
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| CLK(FL) | O | Serial clock signal output to the display driver L: Active |
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3 |
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| I | Fixed at H |
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4 |
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| SIRCS | I | Remote control input |
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5, 6 |
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| NC | — | Not used |
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7 |
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| LED | O | LCD back light ON/lOFF signal output |
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8 |
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| MUTE | O | Mute signal output |
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9 |
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| A/D,D/A RESET | O | A/D, D/A |
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10 |
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| A/D, D/A LATCH | O | A/D, D/A |
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11 |
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| O | Loading motor voltage control output L: High voltage H: Low voltage | ||||||||||
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12 |
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| LDIN | I | Loading motor control input | H: IN |
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13 |
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| LDOUT | O | Loading motor control output | H: OUT |
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14 |
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| MOD | O | Laser modulation switching signal output L: OFF H: ON |
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15 |
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| BYTE | I | Data bus changed input (Connected to ground) |
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16 |
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| CNVSS | — | Ground |
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17 |
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| I | Not used |
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18 |
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| O | Not used |
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19 |
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| RESET | I | System rest input L : reset |
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20 |
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| XOUT | O | Main clock output (10MHz) |
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21 |
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| VSS | — | Ground |
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22 |
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| I | Main clock input (10MHz) |
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| XIN |
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23 |
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| VCC | — | Power supply (+3.3V) |
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24 |
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| I | Fixed at H |
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| NMI |
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25 |
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| DQSY | I | Digital in sync input |
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26 |
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| PDOWN | I | Power down detection input | L: Power down |
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27 |
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| SQSY | I | ADIP (MO) sync or subcode Q (PIT) sync input from CXD2662R (Playback system) | |||||||||
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28 |
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| I | Fixed at H |
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29 |
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| LDON | O | Laser ON/OFF control output | H: Laser ON |
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30 |
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| I | Detection input from the limit switch | L: Sled | |||||||||
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31 |
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| A1 OUT | O | Not used |
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32 |
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| XINIT | I | Interrupt status input from CXD2662R |
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33 |
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| BEEP | O | Not used |
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34 |
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| LRCK1 | O | Not used |
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35 |
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| WR PWR | O | Write power ON/OFF output | L: OFF | H: ON |
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36 |
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| IIC CLK | O | IIC clock output |
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37 |
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| IIC DATA | I/O | IIC data input/output to the |
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38 |
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| SWDT | O | Writing data signal output to the serial bus |
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39 |
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| VCC | — | Power supply (+3.3V) |
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40 |
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| SRDT | I | Reading data signal input from the serial bus |
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41 |
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| VSS | — | Ground |
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42 |
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| SCLK | O | Clock signal output to the serial bus |
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43 |
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| I | Detection signal input from the recording position detection switch | L: REC | |||||||||
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44 |
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| CLIP DATA | O | CLIP serial data output |
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45 |
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| CLIP DATA | I | CLIP serial data input |
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46 |
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| CLIP CLK | O | CLIP serial clock output (Not used) |
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47 |
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| O | Digital rest signal output to the CXD2662R and motor driver L: Reset | ||||||||||
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48 |
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| SENS | I | Internal status (SENSE) input from the CXD2662R |
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49 |
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| I | Detection signal input from the playback position detection switch | L: PLAY | |||||||||
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50 |
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| XLATCH | O | Latch signal output to the serial bus |
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51 |
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| I | Detection signal input from the loading out detection switch |
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52 |
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| RDY | I | Fixed at H |
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53 |
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| ALE/RAS | O | Microprocessor mode output (Not used) |
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54 |
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| HOLD | I | Fixed at H |
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55 |
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| O | Microprocessor mode output (Not used) |
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| HLDA/ALE |
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56 |
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| XBUSY (MNT2) | I | In the state of executive command from the CXD2662R |
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57 |
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| VSS | — | Ground |
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52