Philips P89LPC901, P89LPC903, P89LPC902 user manual TRIM.5 TRIM.4 TRIM.3 TRIM.2 TRIM.1 TRIM.0 WDCON#

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Philips SemiconductorsUser’s Manual - Preliminary -

 

GENERAL DESCRIPTION

 

 

 

 

 

P89LPC901/902/903

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Name

Description

SFR

 

 

 

Bit Functions and Addresses

 

 

Reset Value

 

Address

MSB

 

 

 

 

 

 

LSB

Hex

Binary

 

 

 

 

 

 

 

 

 

 

TH0

Timer 0 High

8CH

 

 

 

 

 

 

 

 

 

00H

00000000

 

TH1

Timer 1 High

8DH

 

 

 

 

 

 

 

 

 

00H

00000000

 

TL0

Timer 0 Low

8AH

 

 

 

 

 

 

 

 

 

00H

00000000

 

TL1

Timer 1 Low

8BH

 

 

 

 

 

 

 

 

 

00H

00000000

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TMOD

Timer 0 and 1 Mode

89H

-

 

-

T1M1

T1M0

-

-

T0M1

T0M0

00H

00000000

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TRIM#

Internal Oscillator Trim Register

96H

-

 

-

TRIM.5

TRIM.4

TRIM.3

TRIM.2

TRIM.1

TRIM.0

Notes 4,5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

WDCON#

Watchdog Control Register

A7H

PRE2

 

PRE1

PRE0

-

-

WDRUN

WDTOF

WDCLK

Notes 3,5

 

WDL#

Watchdog Load

C1H

 

 

 

 

 

 

 

 

 

FFH

11111111

 

 

 

 

 

 

 

 

 

 

 

WFEED1#

Watchdog Feed 1

C2H

 

 

 

 

 

 

 

 

 

 

 

 

WFEED2#

Watchdog Feed 2

C3H

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Notes:

* SFRs are bit addressable.

#SFRs are modified from or added to the 80C51 SFRs. - Reserved bits, must be written with 0’s.

§ BRGR1 and BRGR0 must only be written if BRGEN in BRGCON SFR is ’0’. If any of them is written if BRGEN = 1, result is unpredictable.

Unimplemented bits in SFRs (labeled ’-’ ) are X (unknown) at all times. Unless otherwise specified, ones should not be written to these bits since they may be used for other purposes in future derivatives. The reset values shown for these bits are ’0’s although they are unknown when read.

1.All ports are in input only (high impendance) state after power-up.

2.The RSTSRC register reflects the cause of the P89LPC901/902/903 reset. Upon a power-up reset, all reset source flags are cleared except POF and BOF - the power-on reset value is xx110000.

3.After reset, the value is 111001x1, i.e., PRE2-PRE0 are all 1, WDRUN=1 and WDCLK=1. WDTOF bit is 1 after watchdog reset and is 0 after power-on reset. Other resets will not affect WDTOF.

4.On power-on reset, the TRIM SFR is initialized with a factory preprogrammed value. Other resets will not cause initialization of the TRIM register.

5.The only reset source that affects these SFRs is power-on reset.

2003 Dec 8

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Contents User Manual Philips SemiconductorsTable of Contents Power Monitoring Functions 103 P89LPC901/902/903 List of Figures Pin Configurations P89LPC902Logic Symbols Product comparisonBlock Diagram P89LPC901 CPUBlock Diagram P89LPC902 High Performance Accelerated 2-clock 80C51 CPUBlock Diagram P89LPC903 UartMnemonic PIN no Type Name and Function CIN1AKBI4 KBI5P3.1 XTAL1CMP2 KBI0CIN2A KBI2P1.0 TxDP1.1 RxDSpecial Function Registers Special Function Registers Table P89LPC901Bit Functions and Addresses Hex Special Function Registers Table P89LPC902 CMP1 Cmpref CIN1A KB2 KB0 KB6 KB5 KB4 A7H PRE2 PRE1 PRE0 Wdrun Wdtof Special Function Registers Table P89LPC903 F7H Psth PCH Pkbih TRIM.5 TRIM.4 TRIM.3 TRIM.2 TRIM.1 TRIM.0 WDCON# P89LPC901/902/903 Memory Organization DataSFR CodeGeneral Description Enhanced CPU Clock DefinitionsCPU Clock Oscclk Low Speed Oscillator Option P89LPC901Oscillator Option Selection- P89LPC901 Clock Output P89LPC901On-Chip RC oscillator Option BIT Symbol Function Watchdog Oscillator OptionExternal Clock Input Option P89LPC901 TrimHigh freq Med freqLow freq DivmAtchdog CPU Clock Cclk Wakeup Delay CPU Clock Cclk Modification Divm RegisterL K O sc illa to rP89LPC901/902/903 Low Power Select P89LPC901 P89LPC901/902/903 Interrupt Priority Structure Flag Bits Address Enable Bits Priority Ranking Summary of Interrupts P89LPC901 DescriptionInterrupt Arbitration Summary of Interrupts P89LPC902 DescriptionP89LPC901/902/903 External Interrupt Inputs External Interrupt Pin Glitch SuppressionTF1 ET1 TI & RI/RI ES/ESR Port Configurations Quasi-Bidirectional Output ConfigurationNumber of I/O Pins Available Clock Source Reset Option RSTOpen Drain Output Configuration Quasi-Bidirectional OutputP89LPC901/902/903 Input-Only Configuration Push-Pull Output ConfigurationPort 0 Analog Functions Additional Port Features Port Output Configuration P89LPC901Port Output Configuration P89LPC902 Port Output Configuration P89LPC903Ports Ports Tmod TMOD.7TMOD.6 TMOD.3Mode Tamod P89LPC901TAMOD.7-1 TAMOD.0P89LPC901/902/903 Mode Mode 6 P89LPC901Tcon Timer/Counter 0 or 1 in Mode 0 13-bit counter PclkTimer Overflow toggle output P89LPC901 Pclk TL0TR0 ENT0 Pclk TH0 Timers 0 Real-time clock/system timer Block Diagram Real-time Clock SourceReal-time Clock/System Timer Clock Source P89LPC901 FOSC2 FOSC1 FOSC0 RTCS10UCFG1.2 UCFG1.1 UCFG1.0 Cclk Frequency RTC Clock Frequency XclkReset Sources Affecting the Real-time Clock Real-time Clock/System Timer Clock Source P89LPC902/903Changing RTCS1-0 Real-time Clock Interrupt/Wake UpRtccon Brownout Detection Power-On Detection Brownout OptionsP89LPC901/902/903 Power Reduction Modes Power Reduction ModesPcon Pcona Power Monitoring Functions Uart P89LPC903 P89LPC901/902/903 SFR Space Baud Rate Generator and SelectionUpdating the BRGR1 and BRGR0 SFRs SFR Locations for UARTsFraming Error Break DetectBrgcon Scon More About Uart Mode SstatSerial Port Mode 0 Double Buffering Must Be Disabled Framing Error and RI in Modes 2 and 3 with SM2 = FE and RI when SM2 = 1 in Modes 2P89LPC901/902/903 More About Uart Modes 2 PCON.6 RB8 SMOD0P89LPC901/902/903 Double Buffering Double Buffering in Different Modes9th Bit Bit 8 in Double Buffering Modes 1, 2 Transmission with and without Double BufferingMultiprocessor Communications Automatic Address RecognitionUart P89LPC903 Uart P89LPC903 Power-On reset code execution Block Diagram of ResetRstsrc Comparator Configuration CMPnComparator Input and Output Connections P89LPC901 Internal Reference Voltage Comparator InterruptCmpref Comparator and Power Reduction Modes Comparator Configuration ExampleKbpatn KBPATN.5,4Kbcon KbmaskKBMASK.7 KBMASK.6KBMASK.3 KBMASK.2Keypad Interrupt KBI Watchdog timer configuration Watchdog FunctionWdte Wdse Function Feed Sequence Wdcon P89LPC901/902/903 Watchdog Timeout Values Prescaler Reset PclkWDCONA7H P89LPC901/902/903 Watchdog Timer in Timer Mode Power down operationWatchdog Clock Source PrescalerWatchdog Timer Watchdog Timer Watchdog Timer Software Reset Dual Data PointersAUXR1 MOVCA, @A+DPTR MOVXA, @DPTRMOVX@DPTR, a Features Using Flash as data storageGeneral description Introduction to IAP-LiteFlash Program Memory Fmcon Accessing additional flash elements C-language routine to erase/program all or part of aErase-programming additional flash elements Reading additional flash elementsUCFG1 Fmadrl User Configuration Bytes C-language routine to read a flash elementUCFG1 P89LPC901User Security Bytes SECxP89LPC901/902/903 Boot Vector Boot StatusBootvec BootstatArithmetic LogicalMnemonic Description Bytes Cycles Hex Code Data TransferBoolean BranchingReti B8-BFD8-DF MiscellaneousRevision History 108 Index Dual Data Pointers Port 0 12, 14 SFR 113 P89LPC901/902/903

P89LPC903, P89LPC902, P89LPC901 specifications

The Philips P89LPC901, P89LPC902, and P89LPC903 are a series of 8-bit microcontrollers designed for embedded system applications. These models, which belong to the LPC900 series, are notable for their affordability and versatility, making them an attractive choice for both hobbyists and professional developers.

One of the core features of the P89LPC901, P89LPC902, and P89LPC903 microcontrollers is their powerful 8-bit architecture. Operating at clock speeds up to 20 MHz, they deliver efficient performance suited for a range of tasks. Each model includes a comprehensive instruction set that supports various data manipulation and arithmetic functions, enabling extensive programming capabilities.

These microcontrollers come with built-in memory, with configurations that vary among the three models. The P89LPC901 typically features 4 KB of Flash memory and 256 bytes of RAM, while the P89LPC902 and P89LPC903 offer enhanced memory options. This Flash memory allows for reprogrammability, making it easier to update and modify applications as needed.

Another significant characteristic of the LPC900 series is their integrated peripherals. These models are equipped with a variety of I/O ports, allowing for easy interfacing with other devices and components. The P89LPC901 supports up to 32 I/O pins, while the P89LPC902 and P89LPC903 provide additional features such as analog-to-digital converters (ADCs), timers, and serial communication interfaces. This broad range of peripherals empowers developers to design complex applications without needing extra hardware.

Power consumption is also a key consideration for microcontroller applications. The P89LPC901, P89LPC902, and P89LPC903 are designed with low power consumption in mind, making them ideal for battery-operated devices and energy-efficient projects. They can operate in various power modes, allowing for greater flexibility in deployment.

In terms of technology, these microcontrollers utilize advanced CMOS technology, ensuring high reliability and durability. Their design offers a robust solution for numerous applications, including consumer electronics, industrial controls, and automation systems.

In summary, the Philips P89LPC901, P89LPC902, and P89LPC903 microcontrollers present an attractive combination of performance, integrated peripherals, low power consumption, and versatility. Their features cater to a wide array of applications, keeping them relevant in a rapidly evolving technology landscape. For hobbyists and professionals alike, these microcontrollers represent a reliable foundation for embedded system development.
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