Philips P89LPC901, P89LPC903, P89LPC902 Enhanced CPU, Clock Definitions, CPU Clock Oscclk

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Philips Semiconductors

User’s Manual - Preliminary -

 

 

 

 

 

 

CLOCKS

P89LPC901/902/903

 

 

2. CLOCKS

 

 

Enhanced CPU

The P89LPC901/902/903 uses an enhanced 80C51 CPU which runs at 6 times the speed of standard 80C51 devices. A machine cycle consists of two CPU clock cycles, and most instructions execute in one or two machine cycles.

Clock Definitions

The P89LPC901/902/903 device has several internal clocks as defined below:

•OSCCLK - Input to the DIVM clock divider. OSCCLK is selected from one of the clock sources (see Figure 2-3,Figure 2- 4,Figure 2-5) and can also be optionally divided to a slower frequency (see section "CPU Clock (CCLK) Modification: DIVM Register"). Note: fOSC is defined as the OSCCLK frequency.

•XCLK - Output of the crystal oscillator (P89LPC901)

•CCLK - CPU clock.

•PCLK - Clock for the various peripheral devices and is CCLK/2

CPU Clock (OSCCLK)

The P89LPC901 provides several user-selectable oscillator options. This allows optimization for a range of needs from high precision to lowest possible cost. These options are configured when the FLASH is programmed and include an on-chip watchdog oscillator, an on-chip RC oscillator, an oscillator using an external crystal, or an external clock source. The crystal oscillator can be optimized for low, medium, or high frequency crystals covering a range from 20 kHz to 12 MHz.

The P89LPC902 and P89LPC903 devices allow the user to select between an on-chip watchdog oscillator and an on-chip RC oscillator as the CPU clock source.

Low Speed Oscillator Option - P89LPC901

This option supports an external crystal in the range of 20 kHz to 100 kHz. Ceramic resonators are also supported in this configuration.

Medium Speed Oscillator Option - P89LPC901

This option supports an external crystal in the range of 100 kHz to 4 MHz. Ceramic resonators are also supported in this configuration.

High Speed Oscillator Option - P89LPC901

This option supports an external crystal in the range of 4MHz to 12 MHz. Ceramic resonators are also supported in this configuration. If CCLK is 8MHz or slower, the CLKLP SFR bit (AUXR1.7) can be set to ’1’ to reduce power consumption. On reset, CLKLP is ’0’ allowing highest performance access. This bit can then be set in software if CCLK is running at 8MHz or slower.

2003 Dec 8

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Contents Philips Semiconductors User ManualTable of Contents Power Monitoring Functions 103 P89LPC901/902/903 List of Figures P89LPC902 Pin ConfigurationsProduct comparison Logic SymbolsCPU Block Diagram P89LPC901High Performance Accelerated 2-clock 80C51 CPU Block Diagram P89LPC902Uart Block Diagram P89LPC903KBI5 Mnemonic PIN no Type Name and FunctionCIN1A KBI4XTAL1 P3.1KBI2 CMP2KBI0 CIN2ARxD P1.0TxD P1.1Special Function Registers Table P89LPC901 Special Function RegistersBit Functions and Addresses Hex Special Function Registers Table P89LPC902 CMP1 Cmpref CIN1A KB2 KB0 KB6 KB5 KB4 A7H PRE2 PRE1 PRE0 Wdrun Wdtof Special Function Registers Table P89LPC903 F7H Psth PCH Pkbih TRIM.5 TRIM.4 TRIM.3 TRIM.2 TRIM.1 TRIM.0 WDCON# Code P89LPC901/902/903 Memory OrganizationData SFRGeneral Description Low Speed Oscillator Option P89LPC901 Enhanced CPUClock Definitions CPU Clock OscclkOscillator Option Selection- P89LPC901 Clock Output P89LPC901On-Chip RC oscillator Option Trim BIT Symbol FunctionWatchdog Oscillator Option External Clock Input Option P89LPC901Divm High freqMed freq Low freqAtchdog O sc illa to r CPU Clock Cclk Wakeup DelayCPU Clock Cclk Modification Divm Register L KP89LPC901/902/903 Low Power Select P89LPC901 P89LPC901/902/903 Interrupt Priority Structure Summary of Interrupts P89LPC902 Description Flag Bits Address Enable Bits Priority RankingSummary of Interrupts P89LPC901 Description Interrupt ArbitrationExternal Interrupt Pin Glitch Suppression P89LPC901/902/903 External Interrupt InputsTF1 ET1 TI & RI/RI ES/ESR RST Port ConfigurationsQuasi-Bidirectional Output Configuration Number of I/O Pins Available Clock Source Reset OptionQuasi-Bidirectional Output Open Drain Output ConfigurationP89LPC901/902/903 Input-Only Configuration Push-Pull Output ConfigurationPort 0 Analog Functions Port Output Configuration P89LPC903 Additional Port FeaturesPort Output Configuration P89LPC901 Port Output Configuration P89LPC902Ports Ports TMOD.3 TmodTMOD.7 TMOD.6TAMOD.0 ModeTamod P89LPC901 TAMOD.7-1P89LPC901/902/903 Mode Mode 6 P89LPC901Tcon Pclk Timer/Counter 0 or 1 in Mode 0 13-bit counterTimer Overflow toggle output P89LPC901 Pclk TL0TR0 ENT0 Pclk TH0 Timers 0 Real-time Clock Source Real-time clock/system timer Block DiagramXclk Real-time Clock/System Timer Clock Source P89LPC901FOSC2 FOSC1 FOSC0 RTCS10 UCFG1.2 UCFG1.1 UCFG1.0 Cclk Frequency RTC Clock FrequencyReal-time Clock Interrupt/Wake Up Reset Sources Affecting the Real-time ClockReal-time Clock/System Timer Clock Source P89LPC902/903 Changing RTCS1-0Rtccon Brownout Detection Brownout Options Power-On DetectionPower Reduction Modes P89LPC901/902/903 Power Reduction ModesPcon Pcona Power Monitoring Functions Uart P89LPC903 SFR Locations for UARTs P89LPC901/902/903 SFR SpaceBaud Rate Generator and Selection Updating the BRGR1 and BRGR0 SFRsFraming Error Break DetectBrgcon Scon Sstat More About Uart ModeSerial Port Mode 0 Double Buffering Must Be Disabled PCON.6 RB8 SMOD0 Framing Error and RI in Modes 2 and 3 with SM2 =FE and RI when SM2 = 1 in Modes 2 P89LPC901/902/903 More About Uart Modes 2Double Buffering in Different Modes P89LPC901/902/903 Double BufferingTransmission with and without Double Buffering 9th Bit Bit 8 in Double Buffering Modes 1, 2Automatic Address Recognition Multiprocessor CommunicationsUart P89LPC903 Uart P89LPC903 Block Diagram of Reset Power-On reset code executionRstsrc CMPn Comparator ConfigurationComparator Input and Output Connections P89LPC901 Internal Reference Voltage Comparator InterruptCmpref Comparator Configuration Example Comparator and Power Reduction ModesKBPATN.5,4 KbpatnKbmask KbconKBMASK.2 KBMASK.7KBMASK.6 KBMASK.3Keypad Interrupt KBI Watchdog timer configuration Watchdog FunctionWdte Wdse Function Feed Sequence Wdcon P89LPC901/902/903 Watchdog Timeout Values Prescaler Reset PclkWDCONA7H Prescaler P89LPC901/902/903 Watchdog Timer in Timer ModePower down operation Watchdog Clock SourceWatchdog Timer Watchdog Timer Watchdog Timer Software Reset Dual Data PointersAUXR1 MOVCA, @A+DPTR MOVXA, @DPTRMOVX@DPTR, a Introduction to IAP-Lite FeaturesUsing Flash as data storage General descriptionFlash Program Memory Fmcon C-language routine to erase/program all or part of a Accessing additional flash elementsErase-programming additional flash elements Reading additional flash elementsUCFG1 Fmadrl C-language routine to read a flash element User Configuration BytesP89LPC901 UCFG1SECx User Security BytesBootstat P89LPC901/902/903 Boot VectorBoot Status BootvecLogical ArithmeticData Transfer Mnemonic Description Bytes Cycles Hex CodeBranching BooleanMiscellaneous RetiB8-BF D8-DFRevision History 108 Index Dual Data Pointers Port 0 12, 14 SFR 113 P89LPC901/902/903

P89LPC903, P89LPC902, P89LPC901 specifications

The Philips P89LPC901, P89LPC902, and P89LPC903 are a series of 8-bit microcontrollers designed for embedded system applications. These models, which belong to the LPC900 series, are notable for their affordability and versatility, making them an attractive choice for both hobbyists and professional developers.

One of the core features of the P89LPC901, P89LPC902, and P89LPC903 microcontrollers is their powerful 8-bit architecture. Operating at clock speeds up to 20 MHz, they deliver efficient performance suited for a range of tasks. Each model includes a comprehensive instruction set that supports various data manipulation and arithmetic functions, enabling extensive programming capabilities.

These microcontrollers come with built-in memory, with configurations that vary among the three models. The P89LPC901 typically features 4 KB of Flash memory and 256 bytes of RAM, while the P89LPC902 and P89LPC903 offer enhanced memory options. This Flash memory allows for reprogrammability, making it easier to update and modify applications as needed.

Another significant characteristic of the LPC900 series is their integrated peripherals. These models are equipped with a variety of I/O ports, allowing for easy interfacing with other devices and components. The P89LPC901 supports up to 32 I/O pins, while the P89LPC902 and P89LPC903 provide additional features such as analog-to-digital converters (ADCs), timers, and serial communication interfaces. This broad range of peripherals empowers developers to design complex applications without needing extra hardware.

Power consumption is also a key consideration for microcontroller applications. The P89LPC901, P89LPC902, and P89LPC903 are designed with low power consumption in mind, making them ideal for battery-operated devices and energy-efficient projects. They can operate in various power modes, allowing for greater flexibility in deployment.

In terms of technology, these microcontrollers utilize advanced CMOS technology, ensuring high reliability and durability. Their design offers a robust solution for numerous applications, including consumer electronics, industrial controls, and automation systems.

In summary, the Philips P89LPC901, P89LPC902, and P89LPC903 microcontrollers present an attractive combination of performance, integrated peripherals, low power consumption, and versatility. Their features cater to a wide array of applications, keeping them relevant in a rapidly evolving technology landscape. For hobbyists and professionals alike, these microcontrollers represent a reliable foundation for embedded system development.
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