Philips P89LPC901 Comparator and Power Reduction Modes, Comparator Configuration Example

Page 78

 

Philips Semiconductors

User’s Manual - Preliminary -

 

 

 

 

 

 

ANALOG COMPARATORS

P89LPC901/902/903

 

an interrupt if the comparator interrupt is enabled. The user should therefore disable the comparator interrupt prior to disabling the comparator. Additionally, the user should clear the comparator flag, CMFx, after disabling the comparator.

Comparator and Power Reduction Modes

The comparator(s) may remain enabled when Power down or Idle mode is activated, but the comparator(s) are disabled automatically in Total Power down mode.

If the comparator interrupt is enabled (except in Total Power down mode), a change of the comparator output state will generate an interrupt and wake up the processor.

If the comparator output to a pin is enabled, the pin should be configured in the push-pull mode in order to obtain fast switching times while in power down mode. The reason is that with the oscillator stopped, the temporary strong pullup that normally occurs during switching on a quasi-bidirectional port pin does not take place.

The comparator consumes power in Power down and Idle modes, as well as in the normal operating mode. This fact should be taken into account when system power consumption is an issue. To minimize power consumption, the user can disable the comparator via PCONA.5 or put the device in Total Power down mode.

Comparator Configuration Example

The code shown below is an example of initializing the comparator. This comparator is configured to use the CMPREF inputs. The comparator output drives the CMP pin and generates an interrupt when the comparator output changes.

CMPINIT:

 

 

MOV

PT0AD,#030h

; Disable digital INPUTS on pins that are used

 

 

; for analog functions: CIN, CMPREF.

ANL

P0M2,#0CFh

; Disable digital OUTPUTS on pins that are used

ORL

P0M1,#030h

; for analog functions: CIN, CMPREF.

MOV

CMP1,#024h

; Turn on comparator and set up for:

 

 

; - Negative input from CMPREF pin.

 

 

; - Output to CMP pin enabled.

CALL

delay10us

; The comparator has to start up for at

 

 

; least 10 microseconds before use.

ANL

CMP1,#0FEh

; Clear comparator interrupt flag.

SETB

EC

; Enable the comparator interrupt. The

 

 

; priority is left at the current value.

SETB

EA

; Enable the interrupt system (if needed).

RET

 

; Return to caller.

The interrupt routine used for the comparator must clear the interrupt flag (CMF1 in this case) before returning.

2003 Dec 8

78

Page 77 Page 79
Image 78
Page 77 Page 79
Contents User Manual Philips SemiconductorsTable of Contents Power Monitoring Functions 103 P89LPC901/902/903 List of Figures Pin Configurations P89LPC902Logic Symbols Product comparisonBlock Diagram P89LPC901 CPUBlock Diagram P89LPC902 High Performance Accelerated 2-clock 80C51 CPUBlock Diagram P89LPC903 UartKBI4 Mnemonic PIN no Type Name and FunctionCIN1A KBI5P3.1 XTAL1CIN2A CMP2KBI0 KBI2P1.1 P1.0TxD RxDSpecial Function Registers Special Function Registers Table P89LPC901Bit Functions and Addresses Hex Special Function Registers Table P89LPC902 CMP1 Cmpref CIN1A KB2 KB0 KB6 KB5 KB4 A7H PRE2 PRE1 PRE0 Wdrun Wdtof Special Function Registers Table P89LPC903 F7H Psth PCH Pkbih TRIM.5 TRIM.4 TRIM.3 TRIM.2 TRIM.1 TRIM.0 WDCON# SFR P89LPC901/902/903 Memory OrganizationData CodeGeneral Description CPU Clock Oscclk Enhanced CPUClock Definitions Low Speed Oscillator Option P89LPC901Oscillator Option Selection- P89LPC901 Clock Output P89LPC901On-Chip RC oscillator Option External Clock Input Option P89LPC901 BIT Symbol FunctionWatchdog Oscillator Option TrimLow freq High freqMed freq DivmAtchdog L K CPU Clock Cclk Wakeup DelayCPU Clock Cclk Modification Divm Register O sc illa to rP89LPC901/902/903 Low Power Select P89LPC901 P89LPC901/902/903 Interrupt Priority Structure Interrupt Arbitration Flag Bits Address Enable Bits Priority RankingSummary of Interrupts P89LPC901 Description Summary of Interrupts P89LPC902 DescriptionP89LPC901/902/903 External Interrupt Inputs External Interrupt Pin Glitch SuppressionTF1 ET1 TI & RI/RI ES/ESR Number of I/O Pins Available Clock Source Reset Option Port ConfigurationsQuasi-Bidirectional Output Configuration RSTOpen Drain Output Configuration Quasi-Bidirectional OutputP89LPC901/902/903 Input-Only Configuration Push-Pull Output ConfigurationPort 0 Analog Functions Port Output Configuration P89LPC902 Additional Port FeaturesPort Output Configuration P89LPC901 Port Output Configuration P89LPC903Ports Ports TMOD.6 TmodTMOD.7 TMOD.3TAMOD.7-1 ModeTamod P89LPC901 TAMOD.0P89LPC901/902/903 Mode Mode 6 P89LPC901Tcon Timer/Counter 0 or 1 in Mode 0 13-bit counter PclkTimer Overflow toggle output P89LPC901 Pclk TL0TR0 ENT0 Pclk TH0 Timers 0 Real-time clock/system timer Block Diagram Real-time Clock SourceUCFG1.2 UCFG1.1 UCFG1.0 Cclk Frequency RTC Clock Frequency Real-time Clock/System Timer Clock Source P89LPC901FOSC2 FOSC1 FOSC0 RTCS10 XclkChanging RTCS1-0 Reset Sources Affecting the Real-time ClockReal-time Clock/System Timer Clock Source P89LPC902/903 Real-time Clock Interrupt/Wake UpRtccon Brownout Detection Power-On Detection Brownout OptionsP89LPC901/902/903 Power Reduction Modes Power Reduction ModesPcon Pcona Power Monitoring Functions Uart P89LPC903 Updating the BRGR1 and BRGR0 SFRs P89LPC901/902/903 SFR SpaceBaud Rate Generator and Selection SFR Locations for UARTsFraming Error Break DetectBrgcon Scon More About Uart Mode SstatSerial Port Mode 0 Double Buffering Must Be Disabled P89LPC901/902/903 More About Uart Modes 2 Framing Error and RI in Modes 2 and 3 with SM2 =FE and RI when SM2 = 1 in Modes 2 PCON.6 RB8 SMOD0P89LPC901/902/903 Double Buffering Double Buffering in Different Modes9th Bit Bit 8 in Double Buffering Modes 1, 2 Transmission with and without Double BufferingMultiprocessor Communications Automatic Address RecognitionUart P89LPC903 Uart P89LPC903 Power-On reset code execution Block Diagram of ResetRstsrc Comparator Configuration CMPnComparator Input and Output Connections P89LPC901 Internal Reference Voltage Comparator InterruptCmpref Comparator and Power Reduction Modes Comparator Configuration ExampleKbpatn KBPATN.5,4Kbcon KbmaskKBMASK.3 KBMASK.7KBMASK.6 KBMASK.2Keypad Interrupt KBI Watchdog timer configuration Watchdog FunctionWdte Wdse Function Feed Sequence Wdcon P89LPC901/902/903 Watchdog Timeout Values Prescaler Reset PclkWDCONA7H Watchdog Clock Source P89LPC901/902/903 Watchdog Timer in Timer ModePower down operation PrescalerWatchdog Timer Watchdog Timer Watchdog Timer Software Reset Dual Data PointersAUXR1 MOVCA, @A+DPTR MOVXA, @DPTRMOVX@DPTR, a General description FeaturesUsing Flash as data storage Introduction to IAP-LiteFlash Program Memory Fmcon Accessing additional flash elements C-language routine to erase/program all or part of aErase-programming additional flash elements Reading additional flash elementsUCFG1 Fmadrl User Configuration Bytes C-language routine to read a flash elementUCFG1 P89LPC901User Security Bytes SECxBootvec P89LPC901/902/903 Boot VectorBoot Status BootstatArithmetic LogicalMnemonic Description Bytes Cycles Hex Code Data TransferBoolean BranchingD8-DF RetiB8-BF MiscellaneousRevision History 108 Index Dual Data Pointers Port 0 12, 14 SFR 113 P89LPC901/902/903

P89LPC903, P89LPC902, P89LPC901 specifications

The Philips P89LPC901, P89LPC902, and P89LPC903 are a series of 8-bit microcontrollers designed for embedded system applications. These models, which belong to the LPC900 series, are notable for their affordability and versatility, making them an attractive choice for both hobbyists and professional developers.

One of the core features of the P89LPC901, P89LPC902, and P89LPC903 microcontrollers is their powerful 8-bit architecture. Operating at clock speeds up to 20 MHz, they deliver efficient performance suited for a range of tasks. Each model includes a comprehensive instruction set that supports various data manipulation and arithmetic functions, enabling extensive programming capabilities.

These microcontrollers come with built-in memory, with configurations that vary among the three models. The P89LPC901 typically features 4 KB of Flash memory and 256 bytes of RAM, while the P89LPC902 and P89LPC903 offer enhanced memory options. This Flash memory allows for reprogrammability, making it easier to update and modify applications as needed.

Another significant characteristic of the LPC900 series is their integrated peripherals. These models are equipped with a variety of I/O ports, allowing for easy interfacing with other devices and components. The P89LPC901 supports up to 32 I/O pins, while the P89LPC902 and P89LPC903 provide additional features such as analog-to-digital converters (ADCs), timers, and serial communication interfaces. This broad range of peripherals empowers developers to design complex applications without needing extra hardware.

Power consumption is also a key consideration for microcontroller applications. The P89LPC901, P89LPC902, and P89LPC903 are designed with low power consumption in mind, making them ideal for battery-operated devices and energy-efficient projects. They can operate in various power modes, allowing for greater flexibility in deployment.

In terms of technology, these microcontrollers utilize advanced CMOS technology, ensuring high reliability and durability. Their design offers a robust solution for numerous applications, including consumer electronics, industrial controls, and automation systems.

In summary, the Philips P89LPC901, P89LPC902, and P89LPC903 microcontrollers present an attractive combination of performance, integrated peripherals, low power consumption, and versatility. Their features cater to a wide array of applications, keeping them relevant in a rapidly evolving technology landscape. For hobbyists and professionals alike, these microcontrollers represent a reliable foundation for embedded system development.
Top Page Image Contents