battery if local AC power fails. In addition, circuitry is incorporated in the MFB to disconnect the battery when it is in deep discharge.
The MFB includes circuitry for Fax Tone Detection. By
Fax Tone Detection Circuit & Function is supported from the MFB Issue 2.
The MFB includes one External Relay for General purpose.
MFB can be installed on the SLOT6.
Wireless Terminal Interface Board (WTIB)
The WTIB provides two(2) base station interface circuits and two(2) DSP circuits.
Base station interface circuits are used to connect base stations which interface wireless
The DSP circuits perform 8 channels of ADPCM conversion with integral echo canceling and echo suppression.
WTIB can be installed on the SLOT5.
CO Line Interface Board – Loop Start (LCOB2/LCOB/LCOBE/LCOBA/LCOB4)
There are Analog CO/PABX Line
S/T Interface Board (STIB2)
The S,T interface is based on the existing interface described in ETSI 300. 012 which is based upon ITU_T Recommendations I.430 and provides modifications and further requirements.
This is applied at the S or T reference points for the basic interface structure defined in ITU_T I.412. Layer 1 interfacing requires a balanced metallic transmission medium, for each direction of transmit capability to support 192Kbps(2B+D). For interface circuits, one per transmission direction, are used for transmit digital signals. Data & bit clock are transmitted by the NT master and extracted by TE slave. The
The board line’s specific circuitry contains PEB2086 for Physical layer and data link layer. This board is comprised of one T only port and one S/T Switchable port.
STIB2 can be installed on the SLOT2 and SLOT3.
S/T Interface Board (STIB)
The S,T interface is based on the existing interface described in ETSI 300. 012 which is based upon ITU_T Recommendations I.430 and provides modifications and further requirements.
This is applied at the S or T reference points for the basic interface structure defined in ITU_T I.412. Layer 1 interfacing requires a balanced metallic transmission medium, for each direction of transmit capability to support 192Kbps(2B+D). For interface circuits, one per transmission direction, are used for transmit digital signals. Data & bit clock are transmitted by the NT master and extracted by TE slave. The
The board line’s specific circuitry contains PEB2086 for Physical layer and data link layer.
This board is comprised of one S/T Switchable port.
STIB can be installed on the SLOT2 and SLOT3.
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