Motorola 6806800C08B manual Interface Service

Page 40

NetPlane Core Services

Interface Service

 

 

2.6.7.1Basic Functionality

The main tasks of the MBCSv are:

zDynamic discovery of peer entities

zProviding an interface to the active entity for checkpointing the state updates to the stand- by peers

zWhenever the clients’s role changes to stand-by from any other role or whenever a new active client is detected, the client synchronizes its state with that of the active client (cold synchronization)

zPeriodic synchronization of the client’s state with that of the currently active client to obtain an abbreviated summary account (warm synchronization)

zDriving client behavior depending on the HA role assigned by the client application

2.6.7.2Architecture

The only component of the MBCSv is the Message-Based Checkpointing Agent (MBCA). It provides stateful, message-based checkpoint replication services for its clients. For more details about the MBCA refer to the Message Based Checkpointing Service Programmer's Reference.

2.6.8Interface Service

The Interface Service (IfSv) provides a common means of configuring physical and logical interface information in the NCS system, and allowing that information to be distributed to all applications and services within the system.

2.6.8.1Basic Functionality

The IfSv provides a means by which applications and NCS services can delete and modify interface information for which they are responsible.

The IfSv supports the MIB II Interfaces group of managed objects as well as some Motorola extensions. Furthermore IfSv supports the RMON-MIB defined in RFC 2819 and RMON2-MIB defined in RFC 2021.

The IfSv interfaces with an ifIndexAlocator Platform Service in order to define an ifIndex value for each interface created. If this service is not provided, IfSv generates an ifIndex using an internal mechanism.

2.6.8.2Architecture

The IfSv consists of the following components:

zInterface Director

zInterface Agents

40

NetPlane Core Services Overview User’s Guide (6806800C08B)

Page 39 Page 41
Image 40
Page 39 Page 41
Contents NetPlane Core Services Overview Trademarks Contents Contents NetPlane Core Services Overview User’s Guide 6806800C08BList of Tables Page List of Figures Avantellis Main Software ComponentsPage About this Manual Overview of ContentsAbbreviations About this Manual Abbreviation Definition HPMNotation Description ConventionsBold Summary of Changes Comments and SuggestionsAbout this Manual Notation Description Part Number Edition DescriptionIntroduction Avantellis 3000 Series OverviewNetPlane Software Avantellis 3000 Series Software ArchitectureIntroduction Carrier Grade Linux Operating System Carrier Grade Linux Operating System IntroductionPage NetPlane Core Services Architectural OverviewNetPlane Core Services NCS Services NCS ServicesCorresponding SAF AIS NCS Service Name Services Description Message Distribution Service Message Distribution Service NetPlane Core ServicesNCS Service Name Description Leap Portability LayerDistribution of NCS Services in the Avantellis System NetPlane Core Services System DescriptionSystem Description NCS DirectorsNCS Directors NetPlane Core Services NCS DirectorsNCS Servers NetPlane Core Services NCS ServersSample Applications System Description NetPlane Core Services System DescriptionNetPlane Core ServicesManagement Access Management AccessDescription Category Management Access Information Flow Management Access NetPlane Core ServicesAvailability Service SAF-Compliant NCS ServicesNetPlane Core Services SAF-Compliant NCS Services Availability Director Availability Service NetPlane Core ServicesAvailability Manager Checkpoint Service NetPlane Core Services Checkpoint ServiceAvailability Node Director Availability AgentCheckpoint Service NetPlane Core Services Checkpoint DirectorCheckpoint Node Director Message Queue ServiceCheckpoint Agent Event Distribution Service Event Distribution Service NetPlane Core ServicesMessage Queue Director Message Queue Node DirectorGlobal Lock Service NetPlane Core Services Global Lock ServiceEvent Distribution Server Event Distribution AgentMotorola Complementary NCS Services Distributed Tracing ServiceGlobal Locking Director Global Lock Node DirectorHPI Integration Service Distributed Trace ServerDistributed Trace Agent ArchitectureSimple Software Upgrade System Resource Monitoring ServiceSimple Software Upgrade NetPlane Core Services HPI Adaption Private Library HPLPersistent Store-Restore Service Persistent Store ServerManagement Access Services PSSv Command Execution FunctionsManagement Access Services NetPlane Core Services System Description ParserManagement Access Agent Object Access AgentMessage-Based Checkpointing Service Management Access ServerCommand Line Interpreter Management Access Point Snmp Management Access PointInterface Service Message Distribution Service Interface DirectorInterface Node Director Interface AgentsMessage Distribution Service Software Components NetPlane Core Services Message Distribution ServiceCancelling Application Threads Leap Portability Layer NetPlane Core ServicesLeap Portability Layer Implementation NotesPage Toolkit Installation Toolkit ContentsNCS Toolkit IntroductionMake Commands Building the SamplesDevelopment Host Prerequisites NCS Toolkit Building the SamplesMake CommandsNCS Toolkit ParametersTarget Prerequisites Running the Sample programsNCS Toolkit Running the Sample programs Setting Ldlibrarypath NCS Toolkit Setting LdlibrarypathRunning the Sample Programs Page Motorola Embedded Communications Computing Documents Related DocumentationDocument Title Publication Number Related Documentation Related Specifications Related SpecificationsDocument Title Version/Source

6806800C08B specifications

The Motorola 68000 microprocessor, particularly the revision marked as 68000C08B, stands out as a seminal component in the evolution of computing technology. Introduced in 1979, the 68000 architecture laid the groundwork for many advanced systems, influencing a multitude of platforms, from personal computers to game consoles.

The Motorola 68000C08B features a 16-bit data bus and a 24-bit address bus, allowing for a memory addressing capability of up to 16 MB. This architecture was pioneering for its time, enabling more extensive and complex software applications than its predecessors. The C08 revision particularly emphasized optimizing power consumption while maintaining performance, making it ideal for embedded systems and portable devices.

One of the 68000's key characteristics is its unique register set, which allows for a versatile range of operations. It consists of 8 general-purpose data registers and 8 address registers. The architecture supports both integer and floating-point operations, thanks to an integrated instruction set that facilitates complex mathematical computations, crucial for applications in graphics and gaming.

In terms of performance, the 68000 processor operates at clock speeds ranging from 8 MHz to 16 MHz, depending on the specific variant. The instruction set architecture (ISA) is known for its orthogonality, meaning that most instructions can be used interchangeably across different registers. This design simplicity allows for efficient coding and faster execution times, a significant advantage for developers.

Another remarkable feature of the 68000C08B is its capability for multitasking and improved context switching. Its advanced memory management, combined with support for virtual memory in later implementations, catered to the needs of operating systems and real-time applications, making it suitable for both consumer electronics and industrial machinery.

The Motorola 68000 family also supports a variety of peripherals, enhancing its flexibility as a microcontroller. This compatibility allowed manufacturers to create diverse product lines, from keypads and mice to modems and hard drives.

In summary, the Motorola 68000C08B microprocessor not only advanced the landscape of computer technology in the late 20th century but also helped set the stage for future innovations through its architecture, performance capabilities, and versatility in numerous applications. Its legacy continues to influence modern computing paradigms, ensuring the 68000 remains an essential chapter in the history of microprocessors.
Top Page Image Contents