Motorola 6806800C08B manual Parameters, Make CommandsNCS Toolkit

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"Make" CommandsNCS Toolkit

Synopsis

./make_env.sh <target-architecture> <product>

Parameters

<target-architecture>

The parameter target-architecture determines the CPU architecture of the target. It can be one of the following:

zmvl-ppc

PowerPC-based target

zmvl-i686

Intel(c) Xeon-based target

zmvl-em64t

Intel (c) 64-bit Xeon (LV-Nocona)-based target

zlinux-i386

Intel(c) i386-based target (meant for a development target)

<product>

This parameter determines which of the sample applications for the different NCS services is to be built. The following values are possible.

zleaptest_demo

Builds the LEAP sample program

zedsv_demo

Builds the EDSv sample program

zcli_demo

Builds the CLI sample program

zglsv_demo

Builds the Global Lock Service sample program

zifsv_demo

Builds the Interface Service sample program

zcpsv_demo

Builds the Checkpoint Service sample program

zmqsv_demo

Builds the Message Queue Service sample program

zdlsv_demo

Builds the Distributed Tracing Service sample program

zavsv_demo

Builds the Availability Service sample program

zsnmptm_demo

Builds the SNMP TestMib sample application program

NetPlane Core Services Overview User’s Guide (6806800C08B)

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Contents NetPlane Core Services Overview Trademarks Contents NetPlane Core Services Overview User’s Guide 6806800C08B ContentsList of Tables Page Avantellis Main Software Components List of FiguresPage Abbreviations Overview of ContentsAbout this Manual HPM About this Manual Abbreviation DefinitionBold ConventionsNotation Description Part Number Edition Description Summary of ChangesComments and Suggestions About this Manual Notation DescriptionAvantellis 3000 Series Overview IntroductionIntroduction Avantellis 3000 Series Software ArchitectureNetPlane Software Carrier Grade Linux Operating System Introduction Carrier Grade Linux Operating SystemPage Architectural Overview NetPlane Core ServicesCorresponding SAF AIS NCS Service Name Services Description NCS ServicesNetPlane Core Services NCS Services Leap Portability Layer Message Distribution ServiceMessage Distribution Service NetPlane Core Services NCS Service Name DescriptionNCS Directors Distribution of NCS Services in the Avantellis SystemNetPlane Core Services System Description System DescriptionNCS Directors NCS Directors NetPlane Core ServicesSample Applications NetPlane Core Services NCS ServersNCS Servers System Description System Description NetPlane Core ServicesDescription Category Management AccessNetPlane Core ServicesManagement Access Management Access NetPlane Core Services Management Access Information FlowNetPlane Core Services SAF-Compliant NCS Services SAF-Compliant NCS ServicesAvailability Service Availability Manager Availability Service NetPlane Core ServicesAvailability Director Availability Agent Checkpoint ServiceNetPlane Core Services Checkpoint Service Availability Node DirectorCheckpoint Director Checkpoint Service NetPlane Core ServicesCheckpoint Agent Message Queue ServiceCheckpoint Node Director Message Queue Node Director Event Distribution ServiceEvent Distribution Service NetPlane Core Services Message Queue DirectorEvent Distribution Agent Global Lock ServiceNetPlane Core Services Global Lock Service Event Distribution ServerGlobal Lock Node Director Motorola Complementary NCS ServicesDistributed Tracing Service Global Locking DirectorArchitecture HPI Integration ServiceDistributed Trace Server Distributed Trace AgentHPI Adaption Private Library HPL Simple Software UpgradeSystem Resource Monitoring Service Simple Software Upgrade NetPlane Core ServicesPersistent Store Server Persistent Store-Restore ServiceSystem Description Parser Management Access ServicesPSSv Command Execution Functions Management Access Services NetPlane Core ServicesObject Access Agent Management Access AgentSnmp Management Access Point Message-Based Checkpointing ServiceManagement Access Server Command Line Interpreter Management Access PointInterface Service Interface Agents Message Distribution ServiceInterface Director Interface Node DirectorNetPlane Core Services Message Distribution Service Message Distribution Service Software ComponentsImplementation Notes Cancelling Application ThreadsLeap Portability Layer NetPlane Core Services Leap Portability LayerPage Introduction Toolkit InstallationToolkit Contents NCS ToolkitNCS Toolkit Building the Samples Make CommandsBuilding the Samples Development Host PrerequisitesParameters Make CommandsNCS ToolkitNCS Toolkit Running the Sample programs Running the Sample programsTarget Prerequisites Running the Sample Programs Setting LdlibrarypathSetting Ldlibrarypath NCS Toolkit Page Document Title Publication Number Related DocumentationMotorola Embedded Communications Computing Documents Document Title Version/Source Related SpecificationsRelated Documentation Related Specifications

6806800C08B specifications

The Motorola 68000 microprocessor, particularly the revision marked as 68000C08B, stands out as a seminal component in the evolution of computing technology. Introduced in 1979, the 68000 architecture laid the groundwork for many advanced systems, influencing a multitude of platforms, from personal computers to game consoles.

The Motorola 68000C08B features a 16-bit data bus and a 24-bit address bus, allowing for a memory addressing capability of up to 16 MB. This architecture was pioneering for its time, enabling more extensive and complex software applications than its predecessors. The C08 revision particularly emphasized optimizing power consumption while maintaining performance, making it ideal for embedded systems and portable devices.

One of the 68000's key characteristics is its unique register set, which allows for a versatile range of operations. It consists of 8 general-purpose data registers and 8 address registers. The architecture supports both integer and floating-point operations, thanks to an integrated instruction set that facilitates complex mathematical computations, crucial for applications in graphics and gaming.

In terms of performance, the 68000 processor operates at clock speeds ranging from 8 MHz to 16 MHz, depending on the specific variant. The instruction set architecture (ISA) is known for its orthogonality, meaning that most instructions can be used interchangeably across different registers. This design simplicity allows for efficient coding and faster execution times, a significant advantage for developers.

Another remarkable feature of the 68000C08B is its capability for multitasking and improved context switching. Its advanced memory management, combined with support for virtual memory in later implementations, catered to the needs of operating systems and real-time applications, making it suitable for both consumer electronics and industrial machinery.

The Motorola 68000 family also supports a variety of peripherals, enhancing its flexibility as a microcontroller. This compatibility allowed manufacturers to create diverse product lines, from keypads and mice to modems and hard drives.

In summary, the Motorola 68000C08B microprocessor not only advanced the landscape of computer technology in the late 20th century but also helped set the stage for future innovations through its architecture, performance capabilities, and versatility in numerous applications. Its legacy continues to influence modern computing paradigms, ensuring the 68000 remains an essential chapter in the history of microprocessors.