Motorola 6806800C08B manual Running the Sample programs, Target Prerequisites

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NCS Toolkit

Running the Sample programs

 

 

zmds_demo

Builds the MDS sample program

zmbcsv_demo

Builds the Message-based Checkpointing Service sample program

zsrmsv_demo

Builds the System Resource Monitoring Service sample program

Example

To build the LEAP sample application for a PowerPC target, run the following command:

./make_env.sh mvl-ppc leaptest_demo

A.5 Running the Sample programs

This sections describes the steps to run the sample programs.

A.5.1 Target Prerequisites

The sample programs can only be run on the target architecture they have been built for. Therefore, a sample program first needs to be built based on the target’s architecture. Refer to Appendix A, Building the Samples for steps to cross-compile a sample program for a target.

The target could be a system manager host or a payload node, based on the design of the sample program.

After building the sample programs, executable (binaries) are created in the

$TOOLKIT_HOME/source/common/bin/<target-architecture> directory. Copy them from the development host to the target where they are intended to run. The target directory can be of your choice, however, we recommend /opt/motorola/ncs/scxb/sample_programs or /opt/motorola/ncs/pld/sample_programs.

Sample program may need additional files to be copied onto the target. Please refer to the respective user’s guides for them.

Make sure that NCS software for a particular target is installed on the target machine. The configuration files should be edited to run the NCS software correctly. Most of the samples require the NCS services to be running on the target. The existence of a /opt/motorola/ncs/scxb indicates that the target is a system manager host and the existence of a /opt/motorola/ncs/pld indicates that target is a payload node.

If the target for the sample program is a payload node, the system manager host software should also be running on a connected node.

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NetPlane Core Services Overview User’s Guide (6806800C08B)

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Contents NetPlane Core Services Overview Trademarks Contents Contents NetPlane Core Services Overview User’s Guide 6806800C08BList of Tables Page List of Figures Avantellis Main Software ComponentsPage Overview of Contents About this ManualAbbreviations About this Manual Abbreviation Definition HPMConventions Notation DescriptionBold Summary of Changes Comments and SuggestionsAbout this Manual Notation Description Part Number Edition DescriptionIntroduction Avantellis 3000 Series OverviewAvantellis 3000 Series Software Architecture NetPlane SoftwareIntroduction Carrier Grade Linux Operating System Carrier Grade Linux Operating System IntroductionPage NetPlane Core Services Architectural OverviewNCS Services NetPlane Core Services NCS ServicesCorresponding SAF AIS NCS Service Name Services Description Message Distribution Service Message Distribution Service NetPlane Core ServicesNCS Service Name Description Leap Portability LayerDistribution of NCS Services in the Avantellis System NetPlane Core Services System DescriptionSystem Description NCS DirectorsNCS Directors NetPlane Core Services NCS DirectorsNetPlane Core Services NCS Servers NCS ServersSample Applications System Description NetPlane Core Services System DescriptionManagement Access NetPlane Core ServicesManagement AccessDescription Category Management Access Information Flow Management Access NetPlane Core ServicesSAF-Compliant NCS Services Availability ServiceNetPlane Core Services SAF-Compliant NCS Services Availability Service NetPlane Core Services Availability DirectorAvailability Manager Checkpoint Service NetPlane Core Services Checkpoint ServiceAvailability Node Director Availability AgentCheckpoint Service NetPlane Core Services Checkpoint DirectorMessage Queue Service Checkpoint Node DirectorCheckpoint Agent Event Distribution Service Event Distribution Service NetPlane Core ServicesMessage Queue Director Message Queue Node DirectorGlobal Lock Service NetPlane Core Services Global Lock ServiceEvent Distribution Server Event Distribution AgentMotorola Complementary NCS Services Distributed Tracing ServiceGlobal Locking Director Global Lock Node DirectorHPI Integration Service Distributed Trace ServerDistributed Trace Agent ArchitectureSimple Software Upgrade System Resource Monitoring ServiceSimple Software Upgrade NetPlane Core Services HPI Adaption Private Library HPLPersistent Store-Restore Service Persistent Store ServerManagement Access Services PSSv Command Execution FunctionsManagement Access Services NetPlane Core Services System Description ParserManagement Access Agent Object Access AgentMessage-Based Checkpointing Service Management Access ServerCommand Line Interpreter Management Access Point Snmp Management Access PointInterface Service Message Distribution Service Interface DirectorInterface Node Director Interface AgentsMessage Distribution Service Software Components NetPlane Core Services Message Distribution ServiceCancelling Application Threads Leap Portability Layer NetPlane Core ServicesLeap Portability Layer Implementation NotesPage Toolkit Installation Toolkit ContentsNCS Toolkit IntroductionMake Commands Building the SamplesDevelopment Host Prerequisites NCS Toolkit Building the SamplesMake CommandsNCS Toolkit ParametersRunning the Sample programs Target PrerequisitesNCS Toolkit Running the Sample programs Setting Ldlibrarypath Setting Ldlibrarypath NCS ToolkitRunning the Sample Programs Page Related Documentation Motorola Embedded Communications Computing DocumentsDocument Title Publication Number Related Specifications Related Documentation Related SpecificationsDocument Title Version/Source

6806800C08B specifications

The Motorola 68000 microprocessor, particularly the revision marked as 68000C08B, stands out as a seminal component in the evolution of computing technology. Introduced in 1979, the 68000 architecture laid the groundwork for many advanced systems, influencing a multitude of platforms, from personal computers to game consoles.

The Motorola 68000C08B features a 16-bit data bus and a 24-bit address bus, allowing for a memory addressing capability of up to 16 MB. This architecture was pioneering for its time, enabling more extensive and complex software applications than its predecessors. The C08 revision particularly emphasized optimizing power consumption while maintaining performance, making it ideal for embedded systems and portable devices.

One of the 68000's key characteristics is its unique register set, which allows for a versatile range of operations. It consists of 8 general-purpose data registers and 8 address registers. The architecture supports both integer and floating-point operations, thanks to an integrated instruction set that facilitates complex mathematical computations, crucial for applications in graphics and gaming.

In terms of performance, the 68000 processor operates at clock speeds ranging from 8 MHz to 16 MHz, depending on the specific variant. The instruction set architecture (ISA) is known for its orthogonality, meaning that most instructions can be used interchangeably across different registers. This design simplicity allows for efficient coding and faster execution times, a significant advantage for developers.

Another remarkable feature of the 68000C08B is its capability for multitasking and improved context switching. Its advanced memory management, combined with support for virtual memory in later implementations, catered to the needs of operating systems and real-time applications, making it suitable for both consumer electronics and industrial machinery.

The Motorola 68000 family also supports a variety of peripherals, enhancing its flexibility as a microcontroller. This compatibility allowed manufacturers to create diverse product lines, from keypads and mice to modems and hard drives.

In summary, the Motorola 68000C08B microprocessor not only advanced the landscape of computer technology in the late 20th century but also helped set the stage for future innovations through its architecture, performance capabilities, and versatility in numerous applications. Its legacy continues to influence modern computing paradigms, ensuring the 68000 remains an essential chapter in the history of microprocessors.
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