Motorola 6806800C08B manual Message Queue Service, Checkpoint Node Director, Checkpoint Agent

Page 30

NetPlane Core Services

Message Queue Service

 

 

2.5.2.2.2Checkpoint Node Director

The Checkpoint Node Director (CPND) runs as process both on payload blades and on the two system manager nodes. Its tasks are:

z Accepting checkpoint requests from Checkpoint Agents and streamline requests from applications to checkpoints

z Maintaining and controlling the state information pertaining to checkpoints

z Coordinating read and write accesses to/from checkpoint applications across the cluster

z Keeping track of CPNDs on other nodes in order to update the local data if a CPND that is managing the active checkpoint goes down

z Maintaining local replicas in shared memory

z Storing checkpoint control information in the shared memory so that it may be retrieved after a CPND restart

z Managing accesses to sister replicas and coordinating accesses from other applications to the replicas within the scope of the CPND

2.5.2.2.3Checkpoint Agent

The Checkpoint Agent (CPA) is a linkable library available to applications that want to use checkpoint services.

2.5.3Message Queue Service

The Message Queue Service (MQSv) implements the SAF Message service API.

2.5.3.1Basic Functionality

Sender application(s) which use this service, send messages to queues and queue groups managed by MQSv and not to receiving application(s) directly. This means, if a process dies, the message persists in the queue and can be read by the restarted application or by another process.

Applications may create and destroy queues, where each queue has a globally unique name. Multiple senders may then direct messages to a queue, while a single receiver may read messages from the named queue.

Applications may group several queues into a system-wide named queue group. When sending a message to a queue group, a group policy dictates which queue actually receives the message. The sender does not know how many queues are in the group or what the policy is.

2.5.3.2Architecture

The MQSv service consists of the following three subparts:

zMessage Queue Director

zMessage Queue Node Director

zMessage Queue Agent

30

NetPlane Core Services Overview User’s Guide (6806800C08B)

Page 29 Page 31
Image 30
Page 29 Page 31
Contents NetPlane Core Services Overview Trademarks Contents Contents NetPlane Core Services Overview User’s Guide 6806800C08BList of Tables Page List of Figures Avantellis Main Software ComponentsPage Overview of Contents About this ManualAbbreviations About this Manual Abbreviation Definition HPMConventions Notation DescriptionBold About this Manual Notation Description Summary of ChangesComments and Suggestions Part Number Edition DescriptionIntroduction Avantellis 3000 Series OverviewAvantellis 3000 Series Software Architecture NetPlane SoftwareIntroduction Carrier Grade Linux Operating System Carrier Grade Linux Operating System IntroductionPage NetPlane Core Services Architectural OverviewNCS Services NetPlane Core Services NCS ServicesCorresponding SAF AIS NCS Service Name Services Description NCS Service Name Description Message Distribution ServiceMessage Distribution Service NetPlane Core Services Leap Portability LayerSystem Description Distribution of NCS Services in the Avantellis SystemNetPlane Core Services System Description NCS DirectorsNCS Directors NetPlane Core Services NCS DirectorsNetPlane Core Services NCS Servers NCS ServersSample Applications System Description NetPlane Core Services System DescriptionManagement Access NetPlane Core ServicesManagement AccessDescription Category Management Access Information Flow Management Access NetPlane Core ServicesSAF-Compliant NCS Services Availability ServiceNetPlane Core Services SAF-Compliant NCS Services Availability Service NetPlane Core Services Availability DirectorAvailability Manager Availability Node Director Checkpoint ServiceNetPlane Core Services Checkpoint Service Availability AgentCheckpoint Service NetPlane Core Services Checkpoint DirectorMessage Queue Service Checkpoint Node DirectorCheckpoint Agent Message Queue Director Event Distribution ServiceEvent Distribution Service NetPlane Core Services Message Queue Node DirectorEvent Distribution Server Global Lock ServiceNetPlane Core Services Global Lock Service Event Distribution AgentGlobal Locking Director Motorola Complementary NCS ServicesDistributed Tracing Service Global Lock Node DirectorDistributed Trace Agent HPI Integration ServiceDistributed Trace Server ArchitectureSimple Software Upgrade NetPlane Core Services Simple Software UpgradeSystem Resource Monitoring Service HPI Adaption Private Library HPLPersistent Store-Restore Service Persistent Store ServerManagement Access Services NetPlane Core Services Management Access ServicesPSSv Command Execution Functions System Description ParserManagement Access Agent Object Access AgentCommand Line Interpreter Management Access Point Message-Based Checkpointing ServiceManagement Access Server Snmp Management Access PointInterface Service Interface Node Director Message Distribution ServiceInterface Director Interface AgentsMessage Distribution Service Software Components NetPlane Core Services Message Distribution ServiceLeap Portability Layer Cancelling Application ThreadsLeap Portability Layer NetPlane Core Services Implementation NotesPage NCS Toolkit Toolkit InstallationToolkit Contents IntroductionDevelopment Host Prerequisites Make CommandsBuilding the Samples NCS Toolkit Building the SamplesMake CommandsNCS Toolkit ParametersRunning the Sample programs Target PrerequisitesNCS Toolkit Running the Sample programs Setting Ldlibrarypath Setting Ldlibrarypath NCS ToolkitRunning the Sample Programs Page Related Documentation Motorola Embedded Communications Computing DocumentsDocument Title Publication Number Related Specifications Related Documentation Related SpecificationsDocument Title Version/Source

6806800C08B specifications

The Motorola 68000 microprocessor, particularly the revision marked as 68000C08B, stands out as a seminal component in the evolution of computing technology. Introduced in 1979, the 68000 architecture laid the groundwork for many advanced systems, influencing a multitude of platforms, from personal computers to game consoles.

The Motorola 68000C08B features a 16-bit data bus and a 24-bit address bus, allowing for a memory addressing capability of up to 16 MB. This architecture was pioneering for its time, enabling more extensive and complex software applications than its predecessors. The C08 revision particularly emphasized optimizing power consumption while maintaining performance, making it ideal for embedded systems and portable devices.

One of the 68000's key characteristics is its unique register set, which allows for a versatile range of operations. It consists of 8 general-purpose data registers and 8 address registers. The architecture supports both integer and floating-point operations, thanks to an integrated instruction set that facilitates complex mathematical computations, crucial for applications in graphics and gaming.

In terms of performance, the 68000 processor operates at clock speeds ranging from 8 MHz to 16 MHz, depending on the specific variant. The instruction set architecture (ISA) is known for its orthogonality, meaning that most instructions can be used interchangeably across different registers. This design simplicity allows for efficient coding and faster execution times, a significant advantage for developers.

Another remarkable feature of the 68000C08B is its capability for multitasking and improved context switching. Its advanced memory management, combined with support for virtual memory in later implementations, catered to the needs of operating systems and real-time applications, making it suitable for both consumer electronics and industrial machinery.

The Motorola 68000 family also supports a variety of peripherals, enhancing its flexibility as a microcontroller. This compatibility allowed manufacturers to create diverse product lines, from keypads and mice to modems and hard drives.

In summary, the Motorola 68000C08B microprocessor not only advanced the landscape of computer technology in the late 20th century but also helped set the stage for future innovations through its architecture, performance capabilities, and versatility in numerous applications. Its legacy continues to influence modern computing paradigms, ensuring the 68000 remains an essential chapter in the history of microprocessors.
Top Page Image Contents