Motorola 6806800C08B Leap Portability Layer, Implementation Notes, Cancelling Application Threads

Page 43

LEAP Portability Layer

NetPlane Core Services

 

 

2.8LEAP Portability Layer

The LEAP (Layered Enhancement for Accelerated Portability) layer was introduced to facilitate the porting of NCS applications and user applications to other operating systems. It provides various abstractions from OS-specific details. In particular, LEAP provides:

zIP-layer abstraction

zFile system abstraction

zDynamic library abstraction

zMonitored buffer and memory manager

zMonitored process internal queues

zMonitored timer services which can oversee a large number of timers at once

zObject locking

LEAP provides its services in the form of C macros and libraries to be linked by applications. For further details on the LEAP and on how to use it, refer to the LEAP Programmer's Reference.

2.9Implementation Notes

This section summarizes important information that should be kept in mind when writing applications that make use of NCS.

2.9.1Cancelling Application Threads

NCS libraries is not a cancel-safe implementation. If an application thread acquires a NCS resource (Example: acquired a lock, waiting on semaphore, etc) then the thread should be cancelled only after releasing the resource acquired by the thread. Similarly, the application thread should not be cancelled when execution of NCS API is under progress.

NetPlane Core Services Overview User’s Guide (6806800C08B)

43

Page 42 Page 44
Image 43
Page 42 Page 44
Contents NetPlane Core Services Overview Trademarks Contents NetPlane Core Services Overview User’s Guide 6806800C08B ContentsList of Tables Page Avantellis Main Software Components List of FiguresPage About this Manual Overview of ContentsAbbreviations HPM About this Manual Abbreviation DefinitionNotation Description ConventionsBold Part Number Edition Description Summary of ChangesComments and Suggestions About this Manual Notation DescriptionAvantellis 3000 Series Overview IntroductionNetPlane Software Avantellis 3000 Series Software ArchitectureIntroduction Carrier Grade Linux Operating System Introduction Carrier Grade Linux Operating SystemPage Architectural Overview NetPlane Core ServicesNetPlane Core Services NCS Services NCS ServicesCorresponding SAF AIS NCS Service Name Services Description Leap Portability Layer Message Distribution ServiceMessage Distribution Service NetPlane Core Services NCS Service Name DescriptionNCS Directors Distribution of NCS Services in the Avantellis SystemNetPlane Core Services System Description System DescriptionNCS Directors NCS Directors NetPlane Core ServicesNCS Servers NetPlane Core Services NCS ServersSample Applications System Description System Description NetPlane Core ServicesNetPlane Core ServicesManagement Access Management AccessDescription Category Management Access NetPlane Core Services Management Access Information FlowAvailability Service SAF-Compliant NCS ServicesNetPlane Core Services SAF-Compliant NCS Services Availability Director Availability Service NetPlane Core ServicesAvailability Manager Availability Agent Checkpoint ServiceNetPlane Core Services Checkpoint Service Availability Node DirectorCheckpoint Director Checkpoint Service NetPlane Core ServicesCheckpoint Node Director Message Queue ServiceCheckpoint Agent Message Queue Node Director Event Distribution ServiceEvent Distribution Service NetPlane Core Services Message Queue DirectorEvent Distribution Agent Global Lock ServiceNetPlane Core Services Global Lock Service Event Distribution ServerGlobal Lock Node Director Motorola Complementary NCS ServicesDistributed Tracing Service Global Locking DirectorArchitecture HPI Integration ServiceDistributed Trace Server Distributed Trace AgentHPI Adaption Private Library HPL Simple Software UpgradeSystem Resource Monitoring Service Simple Software Upgrade NetPlane Core ServicesPersistent Store Server Persistent Store-Restore ServiceSystem Description Parser Management Access ServicesPSSv Command Execution Functions Management Access Services NetPlane Core ServicesObject Access Agent Management Access AgentSnmp Management Access Point Message-Based Checkpointing ServiceManagement Access Server Command Line Interpreter Management Access PointInterface Service Interface Agents Message Distribution ServiceInterface Director Interface Node DirectorNetPlane Core Services Message Distribution Service Message Distribution Service Software ComponentsImplementation Notes Cancelling Application ThreadsLeap Portability Layer NetPlane Core Services Leap Portability LayerPage Introduction Toolkit InstallationToolkit Contents NCS ToolkitNCS Toolkit Building the Samples Make CommandsBuilding the Samples Development Host PrerequisitesParameters Make CommandsNCS ToolkitTarget Prerequisites Running the Sample programsNCS Toolkit Running the Sample programs Setting Ldlibrarypath NCS Toolkit Setting LdlibrarypathRunning the Sample Programs Page Motorola Embedded Communications Computing Documents Related DocumentationDocument Title Publication Number Related Documentation Related Specifications Related SpecificationsDocument Title Version/Source

6806800C08B specifications

The Motorola 68000 microprocessor, particularly the revision marked as 68000C08B, stands out as a seminal component in the evolution of computing technology. Introduced in 1979, the 68000 architecture laid the groundwork for many advanced systems, influencing a multitude of platforms, from personal computers to game consoles.

The Motorola 68000C08B features a 16-bit data bus and a 24-bit address bus, allowing for a memory addressing capability of up to 16 MB. This architecture was pioneering for its time, enabling more extensive and complex software applications than its predecessors. The C08 revision particularly emphasized optimizing power consumption while maintaining performance, making it ideal for embedded systems and portable devices.

One of the 68000's key characteristics is its unique register set, which allows for a versatile range of operations. It consists of 8 general-purpose data registers and 8 address registers. The architecture supports both integer and floating-point operations, thanks to an integrated instruction set that facilitates complex mathematical computations, crucial for applications in graphics and gaming.

In terms of performance, the 68000 processor operates at clock speeds ranging from 8 MHz to 16 MHz, depending on the specific variant. The instruction set architecture (ISA) is known for its orthogonality, meaning that most instructions can be used interchangeably across different registers. This design simplicity allows for efficient coding and faster execution times, a significant advantage for developers.

Another remarkable feature of the 68000C08B is its capability for multitasking and improved context switching. Its advanced memory management, combined with support for virtual memory in later implementations, catered to the needs of operating systems and real-time applications, making it suitable for both consumer electronics and industrial machinery.

The Motorola 68000 family also supports a variety of peripherals, enhancing its flexibility as a microcontroller. This compatibility allowed manufacturers to create diverse product lines, from keypads and mice to modems and hard drives.

In summary, the Motorola 68000C08B microprocessor not only advanced the landscape of computer technology in the late 20th century but also helped set the stage for future innovations through its architecture, performance capabilities, and versatility in numerous applications. Its legacy continues to influence modern computing paradigms, ensuring the 68000 remains an essential chapter in the history of microprocessors.
Top Page Image Contents