Clevo D900F manuals
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When we buy new device such as Clevo D900F we often through away most of the documentation but the warranty.
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Even oftener it is hard to remember what does each function in Laptop Clevo D900F is responsible for and what options to choose for expected result.
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102 pages 5.15 Mb
4 Notice11 ContentsIntroduction ..............................................1-1 Disassembly ...............................................2-1 Part Lists ..................................................A-1 Schematic Diagrams.................................B-1 13 Chapter 1: Introduction25 Chapter 2: Disassembly47 Appendix A: Part Lists55 Appendix B: Schematic DiagramsDiagram - Page Diagram - Page Diagram - Page Table B - 1 B - 2 System Block Diagram 56 System Block DiagramBloomfield LGA1366 PROCESSOR ICH10 676 mBGA Sheet 1 of 47 System Block DiagramIntel Tylersburg SOUTH BRIDGE IOH 1295 ball CLEVO D900F System Block DiagramLGA1366 Part A DDR3 1/2 B - 3 57 LGA1366 Part A DDR3 1/2ChannelC Sheet 2 of 47 LGA1366 Part A DDR3 1/2 B - 4 LGA1366 Part B DDR3 2/2 58 LGA1366 Part B DDR3 2/2ChannelA ChannelB ChannelC Sheet 3 of 47 LGA1366 Part B DDR3 2/2 LGA1366 Part C QPI B - 5 59 LGA1366 Part C QPIQPI BUS Ex ternal Con n ectionIntel XDP Debug TO PO W ER Sheet 4 of 47 LGA1366 Part C QPI B - 6 LGA1366 Part C Power 60 LGA1366 Part C PowerD03 CAD NOTE: PLACE ALL 0805 CAPS INSIDE CPU SOC KE T CA V ITY Sheet 5 of 47 LGA1366 Part C Power LGA1366 Part E GND, Thermal B - 7 61 LGA1366 Part E GND, ThermalClose to Thermal IC Place ne ar to th e CPU Therma l ICSheet 6 of 47 LGA1366 Part E GND, Thermal B - 8 DDR3 Channel A SO-DIMM_0 62 DDR3 Channel A SO-DIMM_0CLOSE TO SO-DIMM_0 SO-DIMM0MS:8.5 / 5 / 8.5 SL: 4 / 4 / 4 Layout Note: CLK0/space/CLK_1 ChannelASheet 7 of 47 DDR3 Channel A SO-DIMM_0 DDR3 Channel B SO-DIMM_1 B - 9 63 DDR3 Channel B SO-DIMM_1CLOSE TO SO-DIMM_1 Layout note: SO-DIMM_1 is placed farther from the CPU than SO-DIMM_0 ChannelBMS:8.5 / 5 / 8.5 SL: 4 / 4 / 4 Layout Note: CLK0/space/CLK_1 SO-DIMM1 ChannelBSheet 8 of 47 DDR3 Channel B SO-DIMM_1 B - 10 DDR3 Channel C SO-DIMM_2 64 DDR3 Channel C SO-DIMM_2Layout note: Sheet 9 of 47 DDR3 Channel C SO-DIMM_2 ChannelCMS:8.5 / 5 / 8.5 SL: 4 / 4 / 4 Layout Note: CLK0/space/CLK_1 SO-DIMM2 ChannelCSO-DIMM_2 is pla ced farthe r from the CPU than SO-DIMM_1 X58 QPI Interface B - 11 65 X58 QPI Interface0 1 5.90 GT/s QPI BUS External Conne ction0 1 GP8 0 0 GP12 4.80 GT/s 6.40 GT/sQPI Frequency Mo de Default 10mA 10mA Sheet 10 of 47 X58 QPI Interface B - 12 X58 PCIEX16, PCIEX4, DMI 66 X58 PCIEX16, PCIEX4, DMIDMI PCIEX4 D900B none using now PCIEX16_1 PCIEX16_2 D900B none using now Sheet 11 of 47 X58 PCIEX16, PCIEX4, DMI X58 Misc B - 13 67 X58 Misc2 X 16/1 X 4 (PCI-E):111011DESIGN NOTE: D03 3/2 Sheet 12 of 47 X58 Misc B - 14 X58 PWR 68 X58 PWRSheet 13 of 47 X58 PWR X58 GND B - 15 69 X58 GNDSheet 14 of 47 X58 GND B - 16 ICH10 DMI/PCIE/USB/SATA 70 ICH10 DMI/PCIE/USB/SATAGPIO POWER OKVREF=0.33V DMISATACL To IOHUSB HOST Sheet 15 of 47 ICH10 DMI/PCIE/ USB/SATA ICH10 PCI/SPI/Other B - 17 71 ICH10 PCI/SPI/OtherD03 3/3 20mils HD Audi o MISC GPIOVRM_PWRGD? VR_Ready (VRM_PWRGD)? if not use PULL LOWLAN_RST# PCI_GNT#0 L SPKR PM_PWROK HW Str apNO Reboot NOT NO reboot L SPI ROM LPC R O M PCI Interfa c Zo= 55O? 5% HD Audio Sheet 16 of 47 ICH10 PCI/SPI/ Other B - 18 ICH10 Power/GND 72 ICH10 Power/GNDVCCHDA Sheet 17 of 47 ICH10 Power/GND Intel Debug Card & Fan Control B - 19 73 Intel Debug Card & Fan Control????????, ??QPI???Intel ???? External Connection CPU FAN CONTROL RAM FAN CONTROL VGA FAN CONTROL Intel Debug Card SYS FAN CONTROL Sheet 18 of 47 Intel Debug Card & Fan Control B - 20 Clock Generator CV193 74 Clock Generator CV193PCIE16X C LKIO H USB 100 96 048 266 FSB FSA SRC[7..0] 0100 133.3 96096 133.3 033.3 133 166 48 333 14.318 FSC PCIGLAN SATA PCIE1X NEWCARD PCIE1 6X MXM3. 0 For SLG8XP549T REF CPU DOT 200048 400 Sheet 19 of 47 Clock Generator CV193 MXM3.0 PCI-E B - 21 75 MXM3.0 PCI-ED03 MXM 3.0 MODULE BOARD CONNECTOR MXM 3.0PWR_SRC(10A)-- 7-20V 5VRUN(2.5A)- -5VCLOSE TO MX M CO NN.CLOSE TO MXM PIN E1 4A 3VRUN(1A)--3.3V Sheet 20 of 47 MXM3.0 PCI-E B - 22 MXM PWR, SATA ODD 76 MXM PWR, SATA ODD3A3A Sheet 21 of 47 MXM PWR, SATA ODD HDMI & e-SATA B - 23 77 HDMI & e-SATAD03 3/2 HDMI SWITCH e-SATA Sheet 22 of 47 HDMI & e-SATA B - 24 DVI-I 78 DVI-ID03 3/3 L: CRT Plug- InPLEASE CLOSE TO CONNECTOR DVI D SUB Sheet 23 of 47 DVI-I LCD, INT B - 25 79 LCD, INTSheet 24 of 47 LCD, INT B - 26 Card Reader/1394 80 Card Reader/1394PVT MDIO4 EMI Near Cardreader CONN MOID14 25mil QFN-48SD-CLK SD-DATA2 SD-DATA1 MS-SCLK APREXT :12 m i l JMB380.MS-DATA0 MS Card MDIO0 SD Card SD-CMD MOID12 Hi: on-board Low: on Add-in card MDIO5 SD-DATA0 MS-DATA1 MS-BS Close to JMB380 MDIO2 MS-DATA3 MS-DATA2 MDIO1 SD-DATA3 Close to JMB380 IEEE1394MDIO3 30 mil30 mil Close to CON D03 3/3 Sheet 25 of 47 Card Reader/1394 RTL8111C B - 27 81 RTL8111CL16? ? ? R175? ? ? PCI-E LAN RTL81 11C- VB60 mil must be within 0.5cm must be within 0.5cm (to pin 1) FOR RTL8102E R163? ? ?LANVDD18 LANVDD15 ???RTL8101E ???(?????RTL8101E)RTL8111B RTL8111C 1.8V 1.2V 1.5V 1.2V D03B REALTEK COLAY?? ? ? ? ? DATASHEET?1.2V(? ? ? ) GLAN (RTL8111C)? ? ? INDUCTOR (600mA)Enable Switching regulator Hi: Enable Low: Disable IC?? Pad?? GND Sheet 26 of 47 RTL8111C B - 28 ALC662 / AMP TP6047A-4 82 ALC662 / AMP TP6047A-4D03 2/28 For ALC662 ? ? For ALC888 ?? FRONT C HANNEL 2W??: 2000Hz??(????)AZ_RST# 30mils Fcut(-3db)=520Hz Layout No te: ANALOGINT_MIC_ R SIDE-R SIDE-L JD_SENSE HP_SENSE TPA6047A4 DIGITAL Layout No te:Very close to Audio Codec Layout Note:Codec pin 1 ~ pin 11 and pin 47 an d pin 48 are Digital signals. The others are Analog signals. Very close to Audio Co dec 500Hz High Pass Filte rSPEC=0.47U, EVM=1U Default( L = Mute ) KBC_MUTE# D03 3/4 Sheet 27 of 47 ALC662 / AMP TPA6047A4 KBC-ITE IT8512E B - 29 83 KBC-ITE IT8512ED03 3/3 LOW ACTIVE GPIO WAKE UP GP INTERRUPT LPC/WAKE UP WAKE UP CIR CLOCK UART PS/2 FLASH K/B MATRIX LPC SMBUS PWM DAC IT8512EADC PWM/COUNTER EXT GPIO 7/13 ITE8512E pin4 and pin16 swap for LED dri ver circ uit. D03 3/3 Sheet 28 of 47 KBC-ITE IT8512E B - 30 Mini WLAN/ TMP/ TPA6017A2 84 Mini WLAN/ TMP/ TPA6017A2D03 3/4 REAR CHANNEL 2W??: 500~1000Hz (?????)ADD R617 TPM_BADD LPCPD# inacti ve to LRST # inac tive 32 ~96u s For WLAN DeviceKEY Thermal PadPE3_RX_WAN PE3_TX_WAN WLAN_DET#28 PE3_RX_WAN15 PCIE_CLK_WAN#19 PE3_TX_WAN#15 PE3_RX_WAN#15 PE3_TX_WAN15 SUS_ST#16 PCLK _T P M19 PCIE_CLK_WAN19 SUS_ST# PE3_RX_WAN# PE3_TX_WAN# WLAN_DE T# asserted befo re ent erin g S3 TPM 1.2TPM_PP LPC reset timing:( Internal PD ) HI : 4E/4F h LOW : 2E/2F h Fcut(-3db)=1965Hz 2000Hz High Pass Filter Disable TPM func tion MINI CARD for WAN& DEBUG CARD Sheet 29 of 47 Mini WLAN / TPM/ TPA6017A2 Daughter CONN B - 31 85 Daughter CONNSWITCH BOARD USB BOARD HOTKEY BOARD PHONE JA CK BOAR D CLICK BOARD(???) Sheet 30 of 47 Daughter CONN B - 32 SATA HDD/ CCD/ BT/ PC BEEP 86 SATA HDD/ CCD/ BT/ PC BEEPNormal : 0 NTC 48 mil PC BEEP SATA HDD CON60MIL Sheet 31 of 47 SATA HDD/ CCD/ BT/ PC BEEP CCD Bluetooth--->design value depends on the temperature Thermistor Active : 1 ---> New Card/ MDC/ TV/ Robson B - 33 87 New Card/ MDC/ TV/ RobsonD03 3/4 D03 3/3 48mils TV TUNER MDCROBSON CARD TV CARD Sheet 32 of 47 New Card/ mDC/ TV/ RobsonNEW CARD48milsENE P2 231NF E2 pi n1,8 ,9,1 0,2 0 has internally pulled high (110~330K Ohm) 5A POWER PLAN B - 34 Audio Board 88 Audio BoardSOLDER SIDE VIEW 1 2 3 Sheet 33 of 47 Audio BoardCIR_RX_A AU1 1 3 GREEN BLACK LINE IN (SURR) MIC IN (CENTER) 4 (Audio Board) BLUE PINK SPEAKER OUT (FRONT) SPDIF OUT Card Reader Board B - 35 89 Card Reader BoardSheet 34 of 47 Card Reader Board B - 36 Click Board 90 Click Board(? ) Sheet 35 of 47 Click Board Hotkey Board B - 37 91 Hotkey BoardPLACE BOTT OM SIDE (Hotkey Board) Sheet 36 of 47 Hotkey BoardHOTKEY1#_D HOTKEY1#_D HOTKEY2#_D PLACE TOP SIDE SPI FLASH TOOL B - 38 Switch Board 92 Switch Board(Switch Board)2.7K_04 3VS_E SCROLLOCK#_1 NUMLOC K# _1 WEB0#_1 WEB2#_1 LID_SW#_1 WEB2#_1 PWRS_1 WEB1#_1 Sheet 37 of 47 Switch BoardVIN_E HDD_LED #_1 LID_SW#_1 CAPSLOCK#_1 HDD_LED#_1 PWRS_1 NUMLOCK# _1 WEB1#_1 CR_LED#_1 SCROLLOCK#_1 CAPSLOCK#_1 WEB0#_1 ESWEB2 220_08 ESWEB3 220_08 USB Board B - 39 93 USB Board(? ) Sheet 38 of 47 USB BoardEMI solution,when placeme nt near to USB Port? EMI solution,when placemen t near to USB Port? B - 40 Power CPU_VTT 94 Power CPU_VTT1.L/DCR=R9*C16 2.Vdroop=Io*DCR*R9/R8 3.100uA*R10=Ioc*DCR*R9/R8 4.Vapa=100uA*R11 Sheet 39 of 47 Power CPU_VTT ISL6314CR POWER CKTBOTTOM PAD CONNECT TO GND Through 8 VIAs 25A Power 1.5V, 0.75VS, 12V B - 41 95 Power 1.5V, 0.75VS, 12V25A Sheet 40 of 47 Power 1.5V, 0.75VS, 12V B - 42 Power 1.8VS, 1.1VS 96 Power 1.8VS, 1.1VS3A Sheet 41 of 47 Power 1.8VS, 1.1VS1.8VS 1.1VS25APWM frequency 200KHZ at 4A load; 260KHZ at 20A load Power AC_In, Charge B - 43 97 Power AC_In, Charge0.5V/1A Sheet 42 of 47 Power AC_In, ChargeTOTAL POWER ADJ CHARGE CURRENT ADJ AC IN & CHARGER B - 44 Power Switch, ICH_1.1VS 98 Power Switch, ICH_1.1VS2.5A 2.5A Sheet 43 of 47 Power Switch, ICH_1.1VS Power VCORE B - 45 99 Power VCOREIMON Sheet 44 of 47 Power VCORE0.8V~1.55V/125A Place close to inductor Place close to hottest MOSFET BOTTOM PAD CONNECT TO GND Through 4 VIAs >300us FILTER 3 phase option NCP5392 Int e l VRD 1 1.1 POWER CKT B - 46 Power VDD3, VDD5 100 Power VDD3, VDD5Sheet 45 of 47 Power VDD3, VDD5 VDD3,VDD5 Power Delivery Chart B - 47 101 Power Delivery ChartSheet 46 of 47 Power Delivery Chart B - 48 Power Sequence Diagram Power Sequence Diagram 102 ICH10RSOUTH BRIDGE Sheet 47 of 47 Power Sequence DiagramBloomfield TylersbergNORTH BRIDGE D900F V0.0 BOOT BLOCK DIAGRAM
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