Clevo D900F manual B.Schematic, Schematic Diagrams, LGA1366 Part C QPI B, bu g

LGA1366 Part C QPI

Schematic Diagrams

QPI BUS External Connection

		J_CPU1F
Z04 001	AF1	RSVD	R SVD_AK7	AK7	Z04136

CSI 0_DRX_DP19 AP38

J _CPU1G
QPI _D RX_DP19	QPI _D TX_DP19	AE40	C SI0_ DTX_D P19

		J_CPU1H
Z04048	AM8	RSVD	RSVD	AC8	Z04092

10CSI 0_ DRX_DP[ 19 :0]

10CSI 0_ DRX_DN [19:0]

10CSI 0_ DTX_DP[ 19:0]

10CSI 0_ DTX_DN [19:0]

10 CSI 0_ CLKR X_D P

10 CSI 0_ CLKR X_D N

10 CSI 0_ CLKTX_D P

10 CSI 0_ CLKTX_D N

19CK_13 3M_CPU_DN

19CK_13 3M_CPU_DP

E R	44	I MON
W
	44	H_PSI#
O	39	CPU _VTT_FB
P	39	CPU _VTT_FB-
O	39	CPU VTT_VID4
	39	CPU VTT_VID3
T	39	CPU VTT_VID2
	44	H_VID [7: 0]
	15,44 H_PR OCH OT#
	44	VCC _SENSE
	44	VSS_SENSE
12,1 6, 18		H_PWRGD

CSI0_DR X_D P[19:0 ]

CSI0_DR X_D N[ 19: 0]

CSI0_DTX_D P[19:0 ]

CSI0_DTX_D N[ 19: 0]

CSI0_CLKRX_DP

CSI0_CLKRX_DN

CSI0_CLKTX_ DP

CSI0_CLKTX_ DN

CK_133M_C PU _D N

C K_133M_CPU_DP

IMON H_PSI#

CPU_VTT_FB CPU_VTT_FB-

CPUVTT_VID 4 CPUVTT_VID 3 CPUVTT_VID 2

H_VI D[7:0]

H_PRO CH OT#

VC C_SEN SE VSS_SEN SE

H_PWR GD VTT_PW RGD

	Z04 002	AG1	RSVD	I SEN SE	AK8		IMON
CK_ 133M_CPU_D N		AH35
			BCLK_DN
CK_ 133M_CPU_D P		AJ35
			BCLK_DP
CK_ H_BC LK_I TP_D N AA4					AE36		CPU _VTT_FB
			BCLK_ITP_ DN	VTTD_SEN SE
CK_ H_BC LK_I TP_D P		AA5			AE37		CPU _VTT_FB-
CO MP0		AB41	BCLK_ITP_ DP VSS_SENSE_VTTD		AR9		VCC _SENSE
			COMP0	VCC_SEN SE
					V11		Z04030
H_CATER R_N		AC37	CAT_ ERR*	RSVD
H_PROC HOT#		AG35			AR8		VSS_SENSE
			PROC HOT*	VSS_SEN SE
H_CPUR ST#		AL39			U 11		Z04031
SKTOC C#		AG36	RESET*	RSVD
			SKTOC C*
TH ERMTRIP#		AG37
			TH ER MTRIP*
PECI		AH36			AV6		CPU VTT_VID4
			PECI	VCC TT_VID _4
	Z04 004	AK35			AF7		CPU VTT_VID3
			RSVD	VCC TT_VID _3
					AV3		CPU VTT_VID2
HW RST#		AF10		VCC TT_VID _2
			DBR*
H_MBP_N 0		B3
			BPM_0*
H_MBP_N 1		A5			AB35		VTT_PWR GD
			BPM_1*	VTTPW RGOOD
H_MBP_N 2		C 2			AA6		VDD PW RG OOD
			BPM_2*	VDD PW RGOOD
H_MBP_N 3		B4			AR7		H_PWRGD
			BPM_3*	VCC PW RGOOD
H_MBP_N 4		D 1
			BPM_4*
H_MBP_N 5		C 3
			BPM_5*
H_MBP_N 6		D 2			AF4		PLT_MN R_ EXTTS_N1
			BPM_6*	RSVD
H_MBP_N 7		E2			AB5		PLT_MN R_ EXTTS_N0
			BPM_7*	DDR _THERM*
H_PRDY _N		B41
			PRDY *		AP7		H_PSI#
H_PREQ_ N		C42
H_TCK		AH10	PREQ*	PSI *
			TC K		AL10		H_VID0
H_TDI		AJ 9
H_TDO		AJ10	TD I	VID_0/ MSID _0	AL9		H_VID1
H_TMS		AG10	TD O	VID_1/ MSID _1	AN9		H_VID2
H_TRST_N		AH 9	TMS	VID_2/ MSID _2	AM10		H_VID3
CPU _TAPGOOD		AH 5	TR ST*	VI D_3/CSC _0	AN10		H_VID4
			RSVD	VI D_4/CSC _1	AP9		H_VID5
				VI D_5/CSC _2	AP8		H_VID6
	Z04 005	BA4		VI D6	AN8		H_VID7
	Z04 006	AY 4	RSVD	VI D7
	Z04 007	AW41	RSVD
	Z04 008	AY40	RSVD
	Z04 009	BA40	RSVD		AG4		Z04032
	Z04 010	AV2	RSVD	RSVD		AG5	Z04033

CSI 0_DRX_DN 19 AR 38 CSI 0_DRX_DP18 AN 39

CSI 0_DRX_DN 18	AP39
CSI 0_DRX_DP17	AP41
CSI 0_DRX_DN 17	AP40
CSI 0_DRX_DP16	AM42

CSI 0_DRX_DN 16 AM41
CSI 0_DRX_DP15	AN 40
CSI 0_DRX_DN 15	AM40
CSI 0_DRX_DP14	AN 43
CSI 0_DRX_DN 14	AM43

CSI 0_DRX_DP13	AP42
CSI 0_DRX_DN 13	AN 42
CSI 0_DRX_DP12	AT40
CSI 0_DRX_DN 12	AR 40
CSI 0_DRX_DP11	AT43
CSI 0_DRX_DN 11	AR 43
CSI 0_DRX_DP10	AU 42
CSI 0_DRX_DN 10	AT42
CSI 0_DRX_DP9	AU 40
CSI 0_DRX_DN 9	AU 41
CSI 0_DRX_DP8	AW 40
CSI 0_DRX_DN 8	AV40
CSI 0_DRX_DP7	AU 39
CSI 0_DRX_DN 7	AT39
CSI 0_DRX_DP6	BA38
CSI 0_DRX_DN 6	AY 38
CSI 0_DRX_DP5	AW 37
CSI 0_DRX_DN 5	AW 38
CSI 0_DRX_DP4	BA36
CSI 0_DRX_DN 4	BA37
CSI 0_DRX_DP3	AW 36
CSI 0_DRX_DN 3	AY 36
CSI 0_DRX_DP2	AV36
CSI 0_DRX_DN 2	AV37
CSI 0_DRX_DP1	AU 38
CSI 0_DRX_DN 1	AV38
CSI 0_DRX_DP0	AT37
CSI 0_DRX_DN 0	AU 37

CSI 0_CLKRX_D P AR 41 CSI 0_CLKRX_D N AR 42 CSI 0_CLKTX_D P AG 42

QPI _D RX_DN19	QPI_DTX_D N19	AF40	C SI0_ DTX_D N19
		AD 38	C SI0_ DTX_D P18
QPI _D RX_DP18	QPI _D TX_DP18
		AE38	C SI0_ DTX_D N18
QPI _D RX_DN18	QPI_DTX_D N18
		AB39	C SI0_ DTX_D P17
QPI _D RX_DP17	QPI _D TX_DP17
		AB38	C SI0_ DTX_D N17
QPI _D RX_DN17	QPI_DTX_D N17
		AC 39	C SI0_ DTX_D P16
QPI _D RX_DP16	QPI _D TX_DP16
		AC 38	C SI0_ DTX_D N16
QPI _D RX_DN16	QPI_DTX_D N16
		AC 41	C SI0_ DTX_D P15
QPI _D RX_DP15	QPI _D TX_DP15
		AC 40	C SI0_ DTX_D N15
QPI _D RX_DN15	QPI_DTX_D N15
		AD 40	C SI0_ DTX_D P14
QPI _D RX_DP14	QPI _D TX_DP14
		AD 39	C SI0_ DTX_D N14
QPI _D RX_DN14	QPI_DTX_D N14
		AC 43	C SI0_ DTX_D P13
QPI _D RX_DP13	QPI _D TX_DP13
		AB43	C SI0_ DTX_D N13
QPI _D RX_DN13	QPI_DTX_D N13
		AD 42	C SI0_ DTX_D P12
QPI _D RX_DP12	QPI _D TX_DP12
		AC 42	C SI0_ DTX_D N12
QPI _D RX_DN12	QPI_DTX_D N12
		AE42	C SI0_ DTX_D P11
QPI _D RX_DP11	QPI _D TX_DP11
		AE41	C SI0_ DTX_D N11
QPI _D RX_DN11	QPI_DTX_D N11
		AF43	C SI0_ DTX_D P10
QPI _D RX_DP10	QPI _D TX_DP10
		AE43	C SI0_ DTX_D N10
QPI _D RX_DN10	QPI_DTX_D N10
		AG 40	C SI0_ DTX_D P9
QPI _D RX_DP9	QPI_DTX_D P9
		AG 41	C SI0_ DTX_D N9
QPI _D RX_DN9	QPI _D TX_DN9
		AJ 43	C SI0_ DTX_D P8
QPI _D RX_DP8	QPI_DTX_D P8
		AH 43	C SI0_ DTX_D N8
QPI _D RX_DN8	QPI _D TX_DN8
		AK42	C SI0_ DTX_D P7
QPI _D RX_DP7	QPI_DTX_D P7
		AJ 42	C SI0_ DTX_D N7
QPI _D RX_DN7	QPI _D TX_DN7
		AH 41	C SI0_ DTX_D P6
QPI _D RX_DP6	QPI_DTX_D P6
		AH 42	C SI0_ DTX_D N6
QPI _D RX_DN6	QPI _D TX_DN6	AK40	C SI0_ DTX_D P5
QPI _D RX_DP5	QPI_DTX_D P5	AK41	C SI0_ DTX_D N5
QPI _D RX_DN5	QPI _D TX_DN5	AH 40	C SI0_ DTX_D P4
QPI _D RX_DP4	QPI_DTX_D P4	AJ 40	C SI0_ DTX_D N4
QPI _D RX_DN4	QPI _D TX_DN4	AJ 38	C SI0_ DTX_D P3
QPI _D RX_DP3	QPI_DTX_D P3	AJ 39	C SI0_ DTX_D N3
QPI _D RX_DN3	QPI _D TX_DN3	AK37	C SI0_ DTX_D P2
QPI _D RX_DP2	QPI_DTX_D P2	AK38	C SI0_ DTX_D N2
QPI _D RX_DN2	QPI _D TX_DN2	AF39	C SI0_ DTX_D P1
QPI _D RX_DP1	QPI_DTX_D P1	AG 39	C SI0_ DTX_D N1
QPI _D RX_DN1	QPI _D TX_DN1	AG 38	C SI0_ DTX_D P0
QPI _D RX_DP0	QPI_DTX_D P0	AH 38	C SI0_ DTX_D N0
QPI _D RX_DN0	QPI _D TX_DN0
QPI _C LKRX_DP
QPI _C LKRX_DN

Z04049	AL8	RSVD	RSVD	AD8	Z040	93
Z04050	AM6			AD5	Z040	94
		RSVD	RSVD
Z04051	AM7			AE5	Z040	95
		RSVD	RSVD
Z04052	AN 5			AD6	Z040	96
		RSVD	RSVD
Z04053	AN 6			AD7	Z040	97
		RSVD	RSVD
Z04054	AM4			AB6	Z040	98
		RSVD	RSVD
Z04055	AN 4			AC6	Z040	99
		RSVD	RSVD
Z04056	AP3			AC4	Z041	00
		RSVD	RSVD
Z04057	AP4			AD4	Z041	01
		RSVD	RSVD
Z04058	AM2			AE3	Z041	02
		RSVD	RSVD
Z04059	AM3			AE4	Z041	03
		RSVD	RSVD
Z04060	AN 1			AC3	Z041	04
		RSVD	RSVD
Z04061	AM1			AB3	Z041	05
		RSVD	RSVD
Z04062	AP2			AD2	Z041	06
		RSVD	RSVD
Z04063	AN 2			AD3	Z041	07
		RSVD	RSVD
Z04064	AR 4			AE1	Z041	08
		RSVD	RSVD
Z04065	AR 5			AD1	Z041	09
		RSVD	RSVD
Z04066	AT1			AF2	Z041	10
		RSVD	RSVD
Z04067	AR 1			AF3	Z041	11
		RSVD	RSVD
Z04068	AT3			AH2	Z041	12
		RSVD	RSVD
Z04069	AT2			AG2	Z041	13
		RSVD	RSVD
Z04070	AU 4			AH3	Z041	14
		RSVD	RSVD
Z04071	AU 3			AH4	Z041	15
		RSVD	RSVD
Z04072 AW 4				AK1	Z041	16
		RSVD	RSVD
Z04073 AW 3				AJ1	Z041	17
		RSVD	RSVD
Z04074 AU 7				AJ3	Z041	18
		RSVD	RSVD
Z04075	AU 6			AJ2	Z041	19
Z04076 AY 6		RSVD	RSVD	AG7 Z04120
Z04077	AY 5	RSVD	RSVD	AG6	Z041	21
Z04078	BA7	RSVD	RSVD	AJ4	Z041	22
Z04079	BA6	RSVD	RSVD	AK4	Z041	23
Z04080	AV5	RSVD	RSVD	AK6	Z041	24
Z04081	AW 5	RSVD	RSVD	AK5	Z041	25
Z04082	AY 8	RSVD	RSVD	AH6	Z041	26
Z04083	BA8	RSVD	RSVD	AJ6	Z041	27
Z04084	AV7	RSVD	RSVD	AJ8	Z041	28
Z04085	AW 7	RSVD	RSVD	AJ7	Z041	29
Z04086	AU 8	RSVD	RSVD	AG8	Z041	30
Z04087	AV8	RSVD	RSVD	AH8	Z041	31
		RSVD	RSVD
Z04088	AT6
		RSVD
Z04089	AR 6
Z04090	AF6	RSVD
Z04091	AE6	RSVD LG A13 66		AL6	Z04132

Sheet 4 of 47

LGA1366 Part C

QPI

B.Schematic

	12, 18	H_CPUR ST#
	16, 18	HW RST#
	15,28	PEC I
	15	TH ERMTRI P#
bu g	18	H_MBP_N [7 :0]
e	18	H_PRDY _N
D	18	H_PREQ_N
	18	H_TC K
P	18	H_TD I
	18	H_TD O
D	18	H_TMS

H_C PU RST#

HWR ST#

PEC I

THERMTR IP#

H_MBP_N[ 7:0 ]

H_PRD Y_N

H_PREQ_N

H_TCK

H_TDI

H_TDO

H_TMS

Z04 011	AW 2	RSVD	RSVD	AK2	Z04034
Z04 012	AY 3	RSVD	RSVD
Z04 013	AV1	RSVD		AL3	Z04035
Z04 014	AV42	RSVD	RSVD	AL38	Z04036
Z04 015	AV43	RSVD	RSVD	AM36	Z04037
Z04 016	AW42	RSVD	RSVD	AM38	Z04038
Z04 017	AY41	RSVD	RSVD	AN36	Z04039
Z04 018	AU 2	RSVD	RSVD	AN38	Z04040
		RSVD	RSVD	AR36	Z04041
			RSVD	AR37	Z04042
			RSVD	AT36	Z04043
Z04 019	A40	RVSD	RSVD
Z04 020	AL5

CSI 0_CLKTX_D N AF42

QPI _C LKTX_DP	LGA136 6		AL 43 Z0413 5
QPI _C LKTX_DN		QPI_CMP0
7	O F 12			R5
			21_ 1%_0 4

RSVD	RSVD
8	OF 12

Diagrams

X		18	H_TR ST_N
l	18	18	CPU _TAPGOOD
te		C K_H_BCLK_ITP_DN
	18	C K_H_BCLK_ITP_DP
In

H_TRST_N

CPU_TAPGOOD

CK_H_ BCLK_ ITP_DN CK_H_ BCLK_ ITP_DP

	Z04 021	AL4		RVSD		AY39	Z04044
	Z04 022	AL40		RVSD	RSVD	AY35	Z04045
	Z04 023	AL41		RVSD	RSVD	AW39	Z04046
				RVSD	RSVD	AV35	Z04047
	Z04 024	K2	4	RVSD	RSVD
	Z04 025	AK36
				RVSD
	Z04 026	L1	5
	Z04 027	K1	5	RVSD
CPU _DD R_VR EF		L2	3	RVSD

	CPU _VTT		R502		51_1%_04		VTT_PWR GD
								C	C7 75
		5V	R503		10K_ 04 B			Q48
	R504			C	2N39E 04		.0 1U_10 V_X7R_06
1 2, 15, 16,28,4 4 PWRGD_PS				B		Q49
			10K_04			2N3E 904

C PU_VTT

R 6	4	9. 9_1%_04	H_CPUR ST#
R 8	4	9. 9_1%_04	H_PR OC HOT#
R 17	4	9. 9_1%_04	H_CATERR _N
R 24 5	1K_04		CPU _TAPGO OD
R 14	4	9. 9_1%_04	TH ER MTRIP#
R 35	5	1_1%_04	H_TDI
R 37	5	1_1%_04	H_TDO
R 33	5	1_1%_04	H_TMS
R 38	*1K_04		H_PR DY _N
R 50 5	*10K_04		SKTOC C#
R 24 4	5	11/ 3	H_TCK
		1_1%_04
R 36	5	1_1%_04	H_TRST_N
R 18	4	9. 9_1%_04	COMP0

CR B_CPU _GTLREF		AJ37		DD R_VR EF
	Z04 028	AT5		RVSD
				RVSD
	Z04 029	AT4
				RVSD		LGA13 66
					6		O F 12
							Back up, Bloomf ieldproces soris
							des igned with an int ernal VREF
	1.5V		R 40		1K_1%_04 CPU _DD R_VR EF
				C 52			R39	C51
				. 1U_10V_ 04			1K_1 %_04	.1U _10V_04
	CPU _VTT		R 10		*1K_1%_04 CR B_CPU _GTLR EF
				C 12			R9	C11
				*. 1U_10V_04			*1K_1 %_04	*. 1U _10V_04

1.5 V	R34	806_1%_04		VD DPWR GOOD
			R 32	C 50	C48
			2K_ 04		.1U _10V_X7R_ 04

10U_6.3V_X5R_0 8

17, 24, 30,31,39.	.41,4	3.. 45	5 V
5, 15, 18	,39,4	4 CPU_VTT
5,7.. 9, 40, 43			1.5V

Bloomf ield now requires board lev el termination f or JTAG signals.

LGA1366 Part C QPI B - 5