Cypress CY7C1347G manual

Contents

Main CY7C1347G 4-Mbit (128K x 36) Pipelined Sync SRAM Features Functional Description Selection Guide Document #: 38-05516 Rev. *F Page 2 of 22 Block Diagram ADDRESS REGISTER OUTPUT REGISTERS OUTPUT BUFFERS E INPUT REGISTERS CY7C1347G Document #: 38-05516 Rev. *F Page 3 of 22 Pinouts CY7C1347G Figure 1. 100-Pin TQFP CY7C1347G Pinouts 2345671 A B C D E F G H J K L M N P R 891011 Document #: 38-05516 Rev. *F Page 5 of 22 Table 1. Pin Definitions Name IO Description Functional Overview Single Read Accesses Single Write Accesses Initiated by ADSP Single Write Accesses Initiated by ADSC Burst Sequences CY7C1347G Page Maximum Ratings Operating Range Electrical Characteristics Capacitance Thermal Resistance AC Test Loads and Waveforms Switching Characteristics Switching Waveforms Figure 5. Read Cycle Timing CY7C1347G Figure 6. Write Cycle Timing Note 17.Full width write can be initiated by either GW LOW, or by GW HIGH, BWE LOW, and BWx LOW. Figure 7. Read/Write Cycle Timing Figure 8. ZZ Mode Timing Ordering Information Page Package Diagrams Figure 9. 100-Pin Thin Plastic Quad Flatpack (14 x 20 x 1.4 mm), 51-85050 A Page Figure 11. 165-Ball FBGA (13 x 15 x 1.4 mm), 51-85180 Package Diagrams SOLDER PAD TYPE : NON-SOLDER MASK DEFINED (NSMD) 1.40 MAX. - NOTES : PACKAGE WEIGHT : 0.475g JEDEC REFERENCE : MO-216 / DESIGN 4.6C PACKAGE CODE : BB0AC Document History Page Sales, Solutions, and Legal Information Worldwide Sales and Design Support Products PSoC Solutions