CLK
ADSP
ADSC
ADDRESS
BWE, BW[A :B]
GW
CE
ADV
OE
Data In (D)
| t CYC |
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| tCH | tCL |
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tADS | tADH |
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| tADS | tADH |
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| ADSC extends burst |
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| tADS | tADH |
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tAS | tAH |
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| A1 |
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| A3 |
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| Byte | write signals | are |
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| ignored for first cycle when |
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| tWES | tWEH |
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| ADSP initiates burst |
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| tWES tWEH |
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tCES | tCEH |
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| tADVS | tADVH |
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| ADV suspends burst |
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| tDS | tDH |
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t | D(A1) | D(A2) | D(A2 + 1) | D(A2 + 1) | D(A2 + 2) | D(A2 + 3) | D(A3) | D(A3 + 1) | D(A3 + 2) | |||
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| OEHZ |
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Data Out (Q)
BURST READ
Single WRITE
BURST WRITE
Extended BURST WRITE
DON’T CARE
UNDEFINED
Note
17. Full width write can be initiated by either GW LOW, or by GW HIGH, BWE LOW, and BWx LOW.
Document #: | Page 13 of 22 |
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