24 PCI-1710/1710HG User's Manual
3.5 Trigger Source Connections

Internal Pacer Trigger Connection

The PCI-1710/1710HG card includes one 82C54 compatible programma-
ble timer/counter chip which provides three 16-bit counters connected
to a 1 MHz clock, designated as Counter 0, Counter 1 and Counter 2.
Counter 0 is an event counter for counting events coming from the
input channels. Counter 1 and Counter 2 are cascaded to create a 32-
bit timer for pacer triggering. A low-to-high edge from the Counter 2
output (PACER_OUT) will trigger an A/D con version on the PCI-1710/
1710HG card. At the same time, you can also use this signal as a
synchronous signal for other applications.

External Trigger Source Connection

In addition to pacer triggering, the PCI-1710/1710HG card also allows
external triggering for A/D conversions. When a +5 V source is
connected to TRG_GATE, the external trigger function is enabled. A
low-to-high edge coming from EXT_TRG will trigger an A/D conver-
sion on the PCI-1710/1710HG card. When DGND is connected to
TRG_GATE, the external trigger function is disabled.