Table 4-2. Bit Configurations of Status Registers
Bit |
| Signal | Meaning |
|
|
| Operation Status Group |
0 |
| CAL | The interface is computing new |
| |||
|
| WTG | calibration constants. |
5 |
| The interface is waiting for a trigger. | |
8 |
| CV | The power module is in constant |
|
| CC | voltage mode. |
10 |
| The power module is in constant | |
|
|
| current mode. |
|
| OV | Questionable Status Group |
|
| ||
0 |
| The power module overvoltage | |
| |||
|
| OC | protection circuit has tripped. |
1 |
| The power module overcurrent | |
|
| OT | protection circuit has tripped. |
4 |
| The power module has an | |
|
| RI | overtemperature condition. |
9 |
| The power module remote inhibit state | |
|
| UNR | is active. |
10 |
| The power module output is | |
|
|
| unregulated. |
Bit | Signal | Meaning |
|
| Standard Event Status Group |
0 | OPC | Operation complete. |
2 | QYE | Query error. |
3DDE
4EXE Execution error.
5CME Command error.
7 | PON | Power on. |
|
| Status Byte and Service Request |
|
| Enable Registers |
3QUES Questionable status summary bit.
4MAV Message Available summary bit.
5ESB Event Status summary bit.
6MSS Master Status summary bit.
RQS Request Service bit.
7OPER Operation status summary bit.
Figure 4-1. Power Supply Status Model
52 Status Reporting