AD9843A

Table II. Operation Register Contents (Default Value x000)

 

 

 

 

 

 

Optical Black Clamp

 

Reset

 

 

Power-Down Modes

 

Channel Selection

D10

D9

D8

D7

D6

D5

 

 

 

D4

 

 

D3

D2

 

 

 

D1

D0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0*

0*

0*

1**

0*

0

Enable Clamping

 

0

Normal

 

 

0

0

Normal Power

 

0

0

CCD-Mode

 

 

 

 

 

 

1

Disable Clamping

 

1

Reset All

 

 

0

1

Fast Recovery

 

0

1

AUX1-Mode

 

 

 

 

 

 

 

 

 

 

 

Registers

 

 

1

0

Standby

 

 

 

1

0

AUX2-Mode

 

 

 

 

 

 

 

 

 

 

 

to Default

 

1

1

Total Power-Down

 

1

1

Test Only

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

*Must be set to zero. **Set to one.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Table III. VGA Gain Register Contents (Default Value x096)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MSB

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LSB

 

 

D10

D9

D8

 

D7

 

D6

D5

D4

 

D3

 

 

D2

D1

D0

 

 

Gain (dB)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X

0

0

0

 

1

0

1

 

 

1

 

 

1

 

1

1

 

 

 

2.0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

1

1

 

1

1

1

 

 

1

 

 

1

 

1

0

 

 

 

35.965

 

1

1

1

 

1

1

1

 

 

1

 

 

1

 

1

1

 

 

 

36.0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Table IV. Clamp Level Register Contents (Default Value x080)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MSB

 

 

 

 

 

 

 

 

 

 

 

LSB

 

 

 

 

D10

D9

D8

 

D7

 

D6

D5

D4

 

D3

D2

 

 

D1

D0

 

Clamp Level (LSB)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X

X

X

 

0

 

0

0

0

 

 

0

0

 

 

 

0

0

 

 

0

 

 

 

 

 

 

0

 

0

0

0

 

 

0

0

 

 

 

0

1

 

 

0.25

 

 

 

 

 

0

 

0

0

0

 

 

0

0

 

 

 

1

0

 

 

0.5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

 

1

1

1

 

 

1

1

 

 

 

1

0

 

 

63.5

 

 

 

 

 

1

 

1

1

1

 

 

1

1

 

 

 

1

1

 

 

63.75

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Table V. Control Register Contents (Default Value x000)

 

Data Out

 

 

DATACLK

CLP/PBLK

SHP/SHD

CDS Gain

 

 

 

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

X

0 Enable

 

0* 0*

0 Rising Edge Trigger

0 Active Low

0 Active Low

0 Disabled**

0* 0* 0*

 

1 Three-State

 

1 Falling Edge Trigger

1 Active High

1 Active High

1 Enabled

 

 

 

 

 

 

 

 

 

 

 

 

 

*Must be set to zero.

 

 

 

 

 

 

 

 

 

 

 

**When D3 = 0 (CDS Gain Disabled), the CDS Gain Register is fixed at 4 dB (Code 63 dec).

 

 

 

 

 

 

 

 

 

Table VI. CDS Gain Register Contents (Default Value x000)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MSB

 

 

 

 

LSB

 

Gain (dB) *

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X

X

X

X

X

0

0

0

0

0

0

 

+4.3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0

1

1

1

1

0

 

+10.0

 

 

 

 

 

1

0

0

0

0

0

 

–2.0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

1

1

1

1

1

 

+4.0

 

 

 

 

 

 

 

 

 

 

 

 

 

*Control Register Bit D3 must be set high for the CDS Gain Register to be used.

REV. 0

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Analog Devices AD9843A manual Msb Lsb, Dataclk CLP/PBLK SHP/SHD

AD9843A specifications

The Analog Devices AD9843A is a high-performance, integrated analog-to-digital converter (ADC) designed for a variety of applications requiring precise signal conversion. This device boasts a 12-bit resolution, making it suitable for capturing fine details in complex signals. The AD9843A operates with a maximum sampling rate of up to 130 MSPS (mega samples per second), which allows it to handle fast-changing waveforms effectively, ideal for applications in the fields of telecommunications, instrumentation, and medical imaging.

One of the standout features of the AD9843A is its dual-channel architecture, which enables simultaneous sampling of two input signals. This capability is particularly beneficial in applications such as radar and sonar systems, where capturing multiple input sources in parallel is critical. Furthermore, the ADC incorporates a high-speed programmable gain amplifier (PGA), providing adjustable gain settings to accommodate a wide range of signal amplitudes, ensuring optimal performance across various input conditions.

The AD9843A employs Differential Non-Linearity (DNL) and Integral Non-Linearity (INL) specifications, both of which contribute to its impressive accuracy and linearity. With a DNL of ±0.5 LSB (least significant bit) and an INL of ±1 LSB, the AD9843A minimizes distortion and enhances the fidelity of the digital representation of analog signals. Additionally, the device features low noise performance, which is essential for obtaining high-quality signal digitization, especially in sensitive applications where signal integrity is paramount.

Another key characteristic is the integrated sample-and-hold circuit that allows the ADC to capture input signals with minimal distortion during the conversion process. This design choice helps to stabilize the input signal, reducing the effect of sampling jitter. The AD9843A also provides various output data formats, including binary, gray code, and two's complement, which gives designers the flexibility to interface the ADC with different digital systems.

In terms of power consumption, the AD9843A is efficient, operating at a typical supply voltage of 5V. It offers a significant advantage for battery-operated devices by ensuring that the power requirements are kept low without compromising performance. With its combination of high throughput, low noise, and versatility, the Analog Devices AD9843A stands out as a robust solution for high-speed data acquisition systems, making it a preferred choice among engineers and designers across various industries.