AD9843A

DEFINITIONS OF SPECIFICATIONS

DIFFERENTIAL NONLINEARITY (DNL)

An ideal ADC exhibits code transitions that are exactly 1 LSB apart. DNL is the deviation from this ideal value. Thus every code must have a finite width. No missing codes guaranteed to 10-bit resolution indicates that all 1024 codes, respectively, must be present over all operating conditions.

PEAK NONLINEARITY

Peak nonlinearity, a full signal chain specification, refers to the peak deviation of the output of the AD9843A from a true straight line. The point used as “zero scale” occurs 1/2 LSB before the first code transition. “Positive full scale” is defined as a Level 1, 1/2 LSB beyond the last code transition. The devia- tion is measured from the middle of each particular output code to the true straight line. The error is then expressed as a percentage of the 2 V ADC full-scale signal. The input signal is always appropriately gained up to fill the ADC’s full-scale range.

TOTAL OUTPUT NOISE

chain at the specified gain setting. The output noise can be converted to an equivalent voltage, using the relationship 1 LSB

=(ADC Full Scale/2N codes) when N is the bit resolution of the ADC. For the AD9843A, 1 LSB is 2 mV.

POWER SUPPLY REJECTION (PSR)

The PSR is measured with a step change applied to the supply pins. This represents a very high-frequency disturbance on the AD9843A’s power supply. The PSR specification is calculated from the change in the data outputs for a given step change in the supply voltage.

INTERNAL DELAY FOR SHP/SHD

The internal delay (also called aperture delay) is the time delay that occurs from when a sampling edge is applied to the AD9843A until the actual sample of the input signal is held. Both SHP and SHD sample the input signal during the transition from low to high, so the internal delay is measured from each clock’s rising edge to the instant the actual internal sample is taken.

The rms output noise is measured using histogram techniques. The standard deviation of the ADC output codes is calculated in LSB, and represents the rms noise level of the total signal

EQUIVALENT INPUT CIRCUITS

DVDD

330

DVSS

ACVDD

ACVSSACVSS

Figure 1. Digital Inputs—SHP, SHD, DATACLK, CLPOB, CLPDM, HD, VD, PBLK, SCK, SL

DVDDDRVDD

DATA

Figure 3. CCDIN (Pin 30)

DVDD

DVDD

DATA IN

THREE-

DOUT

STATE

 

DATA OUT

330

RNW

DVSS

DVSS

DVSS

Figure 4. SDATA (Pin 47)

DVSSDRVSS

Figure 2. Data Outputs

REV. 0

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Analog Devices AD9843A Differential Nonlinearity DNL, Peak Nonlinearity, Total Output Noise, Power Supply Rejection PSR

AD9843A specifications

The Analog Devices AD9843A is a high-performance, integrated analog-to-digital converter (ADC) designed for a variety of applications requiring precise signal conversion. This device boasts a 12-bit resolution, making it suitable for capturing fine details in complex signals. The AD9843A operates with a maximum sampling rate of up to 130 MSPS (mega samples per second), which allows it to handle fast-changing waveforms effectively, ideal for applications in the fields of telecommunications, instrumentation, and medical imaging.

One of the standout features of the AD9843A is its dual-channel architecture, which enables simultaneous sampling of two input signals. This capability is particularly beneficial in applications such as radar and sonar systems, where capturing multiple input sources in parallel is critical. Furthermore, the ADC incorporates a high-speed programmable gain amplifier (PGA), providing adjustable gain settings to accommodate a wide range of signal amplitudes, ensuring optimal performance across various input conditions.

The AD9843A employs Differential Non-Linearity (DNL) and Integral Non-Linearity (INL) specifications, both of which contribute to its impressive accuracy and linearity. With a DNL of ±0.5 LSB (least significant bit) and an INL of ±1 LSB, the AD9843A minimizes distortion and enhances the fidelity of the digital representation of analog signals. Additionally, the device features low noise performance, which is essential for obtaining high-quality signal digitization, especially in sensitive applications where signal integrity is paramount.

Another key characteristic is the integrated sample-and-hold circuit that allows the ADC to capture input signals with minimal distortion during the conversion process. This design choice helps to stabilize the input signal, reducing the effect of sampling jitter. The AD9843A also provides various output data formats, including binary, gray code, and two's complement, which gives designers the flexibility to interface the ADC with different digital systems.

In terms of power consumption, the AD9843A is efficient, operating at a typical supply voltage of 5V. It offers a significant advantage for battery-operated devices by ensuring that the power requirements are kept low without compromising performance. With its combination of high throughput, low noise, and versatility, the Analog Devices AD9843A stands out as a robust solution for high-speed data acquisition systems, making it a preferred choice among engineers and designers across various industries.