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C H A P T E R 2
Architecture
Processor module
The processor module contains the
■G3 microprocessor
■512 KB backside cache memory
■main memory (minimum of 32 MB)
■system ROM (1 MB)
■memory controller and the PCI bus bridge IC
The devices on the processor module communicate with the main logic board by way of the PCI bus.
This section includes a description of the microprocessor, the backside cache, and the memory controller IC. For a description of the
G3 Microprocessor
The latest family of PowerPC microprocessor designs is called “G3,” for “generation three.” The G3 microprocessors have several features that contribute to improved performance, including:
■larger
■a
■a separate backside bus for the L2 cache, providing faster clock speed and overlapped bus transactions
■a microprocessor core optimized for Mac OS applications
The G3 microprocessor in the iMac runs at a clock speed of 233 MHz.
Backside Cache
The controller and tag storage for the backside cache are built into the microprocessor chip. The cache controller includes bus management and control hardware that allows the cache to run at a
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