C H A P T E R 4
RAM Expansion
The JEDEC specification for the SO-DIMM defines a Serial Presence Detect (SPD) feature that contains the attributes of the module. SO-DIMMs for use in the iMac are required to have the SPD feature. Information about the required values to be stored in the presence detect EEPROM is in section 4.1.2.5 and Figure 4.5.6–C (144 Pin SDRAM SO–DIMM, PD INFORMATION) of the JEDEC standard 21-C specification, release 7.
Because the SO-DIMM connector has only two clock lines, and each clock line is limited to only 4 loads, an SO-DIMM with more than 8 SDRAM devices must have buffers on the clock lines. The buffers must be zero-delay type, such as phase-lock loop (PLL), which regenerates the clock signals. For example, the computer can support a 128-MB SO-DIMM using 16 devices and a PLL clock buffer.
SDRAM Devices
The SDRAM devices used in the RAM expansion modules must be self-refresh type devices for operation from a 3.3-V power supply. The speed of the SDRAM devices must be 100 MHz or greater, corresponding to a cycle time of 10 ns or less.
The devices are programmed to operate with a CAS latency of 3. At that CAS latency, the access time from the clock transition must be 7 ns or less. The burst length must be at least 4 and the minimum clock delay for back-to-back random column access cycles must be a latency of 1 clock cycle.
