Clevo M740TU, M760TU manual Ddrii SO-DIMM, Sheet 12, D S P D, T E S T, E F

Schematic Diagrams

DDRII SO-DIMM - 0

SO-DIMM 0

+VTT_MEM RESISTORS

				V T T _ ME M
M _ C K E 0	1	8		C 3 9 7
M _ A _ B S 2 #	2		7	R N 1

. 1U _ 10 V _ X 7R _ 04

			8 M _ A _ A [ 1 4: 0 ]					J_ D I MM _1 A
						M _ A _A 0	1 02	A 0	D Q 0	5	M _ A _D Q0
						M _ A _A 1	1 01			7	M _ A _D Q1
								A 1	D Q 1
						M _ A _A 2	1 00			1 7	M _ A _D Q2
						M _ A _A 3	99	A 2	D Q 2	1 9	M _ A _D Q3
						M _ A _A 4	98	A 3	D Q 3	4	M _ A _D Q4
						M _ A _A 5	97	A 4	D Q 4	6	M _ A _D Q5
						M _ A _A 6	94	A 5	D Q 5	1 4	M _ A _D Q6
						M _ A _A 7	92	A 6	D Q 6	1 6	M _ A _D Q7
Layout Note:						M _ A _A 8	93	A 7	D Q 7	2 3	M _ A _D Q8
						M _ A _A 9	91	A 8	D Q 8	2 5	M _ A _D Q9
								A 9	D Q 9
signal/space/signal:						M _ A _A 10	1 05	A 1 0 / A P	D Q1 0	3 5	M _ A _D Q1 0
						M _ A _A 11	90			3 7	M _ A _D Q1 1
								A 1 1	D Q1 1
						M _ A _A 12	89			2 0	M _ A _D Q1 2
8 / 4 / 8						M _ A _A 13	1 16	A 1 2	D Q1 2	2 2	M _ A _D Q1 3
								A 1 3	D Q1 3
						M _ A _A 14	86			3 6	M _ A _D Q1 4
							84	A 1 4	D Q1 4	3 8	M _ A _D Q1 5
						M _ A _B S 2#		A 1 5	D Q1 5
			8 M _ A _B S 2#				85			4 3	M _ A _D Q1 6
								A 1 6 _ B A 2	D Q1 6	4 5	M _ A _D Q1 7
									D Q1 7
			8 M _ A _B S 0#			M _ A _B S 0#	1 07	B A 0		5 5	M _ A _D Q1 8
						M _ A _B S 1#	1 06		D Q1 8	5 7	M _ A _D Q1 9
			8 M _ A _B S 1#					B A 1	D Q1 9
						M _ C S 0 #	1 10			4 4	M _ A _D Q2 0
			7 M_ C S 0#			M _ C S 1 #	1 15	S 0 #	D Q2 0	4 6	M _ A _D Q2 1
			7 M_ C S 1#					S 1 #	D Q2 1
							30			5 6	M _ A _D Q2 2
			7 M_ C L K _ D D R 0				32	C K 0	D Q2 2	5 8	M _ A _D Q2 3
			7 M _ C L K _ D D R 0 #					C K 0 #	D Q2 3
							1 64			6 1	M _ A _D Q2 4
			7 M_ C L K _ D D R 1				1 66	C K 1	D Q2 4	6 3	M _ A _D Q2 5
			7 M _ C L K _ D D R 1 #					C K 1 #	D Q2 5
						M _ C K E 0	79			7 3	M _ A _D Q2 6
			7 M_ C K E 0			M _ C K E 1	80	C K E 0	D Q2 6	7 5	M _ A _D Q2 7
			7 M_ C K E 1					C K E 1	D Q2 7
						M _ A _C A S #	1 13			6 2	M _ A _D Q2 8
			8 M_ A _ C A S #			M _ A _R A S #	1 08	C A S #	D Q2 8	6 4	M _ A _D Q2 9
			8 M_ A _ R A S #			M _ A _W E #	1 09	R A S #	D Q2 9	7 4	M _ A _D Q3 0
			8 M _A _ W E #		S A	0_ D I M0 _ 1	1 98	W E #	D Q3 0	7 6	M _ A _D Q3 1
					S A 1_ D I M0 _ 1		2 00	S A 0	D Q3 1	1 23	M _ A _D Q3 2
			2 , 13 , 2 4 I C H _ S MB C L K 0				1 97	S A 1	D Q3 2	1 25	M _ A _D Q3 3
							1 95	S C L	D Q3 3	1 35	M _ A _D Q3 4
	R 1 9 7	R 1 98	2 , 13 , 2 4 I C H _ S MB D A T 0					S D A	D Q3 4	1 37	M _ A _D Q3 5
						M _ OD T0	1 14		D Q3 5	1 24	M _ A _D Q3 6
	1 0K _ 0 4	1 0 K _ 0 4	7 M_ O D T 0			M _ OD T1	1 19	O D T 0	D Q3 6	1 26	M _ A _D Q3 7
			7	M_ O D T 1				O D T 1	D Q3 7	1 34	M _ A _D Q3 8
			8	M_ A _ D M 0			10	D M0	D Q3 8	1 36	M _ A _D Q3 9
							26		D Q3 9	1 41	M _ A _D Q4 0
			8 M_ A _ D M 1				52	D M1	D Q4 0	1 43	M _ A _D Q4 1
			8 M_ A _ D M 2

M _ A _D Q[ 6 3 : 0 ] 8
						1. 8 V
							11 2	J _ D I M M_ 1 B
D03B-0329								V D D	1	V S S 1 6
							11 1
							11 7	V D D	2	V S S 1 7
							9 6	V D D	3	V S S 1 8
							9 5	V D D 4		V S S 1 9
								V D D 5		V S S 2 0
							11 8
3. 3 V S							8 1	V D D 6		V S S 2 1
								V D D 7		V S S 2 2
							8 2
				20m il s			8 7	V D D 8		V S S 2 3
								V D D 9		V S S 2 4
	C 7 26			C 7 2 7			10 3	V D D 1 0		V S S 2 5
							8 8
								V D D 1 1		V S S 2 6
							10 4
	2 . 2 U _ 6 . 3 V _ 06			. 1U _ 16 V _ 0 4				V D D 1 2		V S S 2 7
							19 9			V S S 2 8
								V D D S P D		V S S 2 9
							8 3			V S S 3 0
								N C 1		V S S 3 1
							12 0
								N C 2		V S S 3 2
							5 0
			7 , 1 3 P M_ E X T T S 1#				6 9	N C 3		V S S 3 3
								N C 4		V S S 3 4
							16 3
		2 0mil s						N C T E S T		V S S 3 5
							1			V S S 3 6
					M V R E F _ D I M0 _ 1			V R E F		V S S 3 7
						D I M M0 _ GN D 0 20 1				V S S 3 8
		C 4 02		C 4 0 8				G N D 0		V S S 3 9
						D I M M0 _ GN D 1	20 2
								G N D 1		V S S 4 0
		2 . 2 U _ 6 . 3 V _ 06		. 1U _ 16 V _ 0 4						V S S 4 1
							4 7			V S S 4 2
							13 3	V S S 1		V S S 4 3
							18 3	V S S 2		V S S 4 4
							7 7	V S S 3		V S S 4 5
							1 2	V S S 4		V S S 4 6
							4 8	V S S 5		V S S 4 7
							18 4	V S S 6		V S S 4 8
								V S S 7		V S S 4 9
							7 8

18

24

41

53

42

54

59

65

60

66

127

139

128

145

165

171

172

177

187

178

190

9

21

33

155

132

144

156

168

3

15

27

39

M _ C K E 1	3		6	8 P 4 R X 5 6 _0 4	C 3 9 2
	4		5
M _ A _ A 11	1		8	R N 2	C 7 1 7
M _ A _ A 14	2		7
M _ A _ A 7	3		6	8 P 4 R X 5 6 _0 4	C 7 2 4
M _ A _ A 6	4		5
M _ A _ A 4	1		8
					C 3 9 4
M _ A _ A 2	2		7	R N 3
M _ A _ A 0	3	6	8 P 4 R X 5 6 _0 4
M _ A _ B S 1 #	4
			5		C 3 9 3
M _ A _ R A S #	1		8
M _ C S 0 #	2		7	R N 4
M _ OD T0	3		6	8 P 4 R X 5 6 _0 4	C 3 9 1
M _ A _ A 13	4		5
M _ A _ A 5	1		8		C 7 2 1
M _ A _ A 8	2		7	R N 2 0
M _ A _ A 9	3		6	8 P 4 R X 5 6 _0 4
M _ A _ A 12	4		5		C 7 2 3
M _ A _ B S 0 #	1		8		C 7 1 6
M _ A _ A 10	2	7	R N 2 1
M _ A _ A 1	3
			6	8 P 4 R X 5 6 _0 4
M _ A _ A 3	4
			5
					C 3 9 6
M _ OD T1	1		8	R N 2 2
M _ C S 1 #	2		7
M _ A _ C A S #	3		6	8 P 4 R X 5 6 _0 4	C 7 2 0
M _ A _ W E #	4		5
					C 7 2 5
					C 3 9 5
					C 7 1 9
		D03-0221			C 7 2 2
					C 7 1 8

. 01 U _5 0 V _ X7 R _0 4

. 1U _ 10 V _ X 7R _ 04

*. 1 U _ 1 0 V _X 7 R _ 0 4

. 1U _ 10 V _ X 7R _ 04

*. 1 U _ 1 0 V _X 7 R _ 0 4

. 1U _ 10 V _ X 7R _ 04

*. 1 U _ 1 0 V _X 7 R _ 0 4

. 1U _ 10 V _ X 7R _ 04

. 1U _ 10 V _ X 7R _ 04

*. 1 U _ 1 0 V _X 7 R _ 0 4

. 1U _ 10 V _ X 7R _ 04

. 1U _ 10 V _ X 7R _ 04

. 1U _ 10 V _ X 7R _ 04

. 1U _ 10 V _ X 7R _ 04

. 01 U _5 0 V _ X7 R _0 4

*. 1 U _ 1 0 V _X 7 R _ 0 4

Sheet 12 of 51

DDRII SO-DIMM - 0

B.Schematic

			67		D M2	D Q4 1	1 51	M _ A _D Q4 2
	8 M_ A _ D M 3				D M3	D Q4 2
			1 30				1 53	M _ A _D Q4 3
	8 M_ A _ D M 4
		1 47			D M4	D Q4 3	1 40	M _ A _D Q4 4
	8 M_ A _ D M 5				D M5	D Q4 4
		1 70					1 42	M _ A _D Q4 5
	8 M_ A _ D M 6				D M6	D Q4 5
			1 85				1 52	M _ A _D Q4 6
	8 M_ A _ D M 7				D M7	D Q4 6
							1 54	M _ A _D Q4 7
		13				D Q4 7	1 57	M _ A _D Q4 8
8	M_ A _ D Q S 0				D QS 0	D Q4 8
			31				1 59	M _ A _D Q4 9
8	M_ A _ D Q S 1
		51			D QS 1	D Q4 9	1 73	M _ A _D Q5 0
8	M_ A _ D Q S 2				D QS 2	D Q5 0
			70				1 75	M _ A _D Q5 1
8	M_ A _ D Q S 3
		1 31			D QS 3	D Q5 1	1 58	M _ A _D Q5 2
8	M_ A _ D Q S 4				D QS 4	D Q5 2
			1 48				1 60	M _ A _D Q5 3
8	M_ A _ D Q S 5
		1 69			D QS 5	D Q5 3	1 74	M _ A _D Q5 4
8	M_ A _ D Q S 6				D QS 6	D Q5 4		M _ A _D Q5 5
			1 88				1 76
8	M_ A _ D Q S 7
					D QS 7	D Q5 5	1 79	M _ A _D Q5 6
						D Q5 6
8	M_ A _ D Q S 0#		11				1 81	M _ A _D Q5 7
		29			D QS 0 #	D Q5 7	1 89
								M _ A _D Q5 8
8	M_ A _ D Q S 1#		49		D QS 1 #	D Q5 8	1 91	M _ A _D Q5 9
8	M_ A _ D Q S 2#
		68			D QS 2 #	D Q5 9	1 80
								M _ A _D Q6 0
8	M_ A _ D Q S 3#		1 29		D QS 3 #	D Q6 0	1 82	M _ A _D Q6 1
8	M_ A _ D Q S 4#
		1 46			D QS 4 #	D Q6 1	1 92
								M _ A _D Q6 2
8	M_ A _ D Q S 5#				D QS 5 #	D Q6 2
		1 67					1 94	M _ A _D Q6 3
8	M_ A _ D Q S 6#		1 86		D QS 6 #	D Q6 3
8	M_ A _ D Q S 7#				D QS 7 #
				2-1 7 3 40 7 3 -1

1. 8 V

7 1		V S S 8		V S S 5 0
		V S S	9	V S S 5 1
7 2
12 1		V S S	10	V S S 5 2
		V S S	11	V S S 5 3
12 2
19 6		V S S	12	V S S 5 4
		V S S	13	V S S 5 5
19 3
8		V S S	14	V S S 5 6
		V S S	15	V S S 5 7
	2 -1 7 3		40 7 3 -1

V T T _ ME M

C 40 1	C 4 0	0
1 0 U _ 1 0 V _0 8	1 0U _ 10 V _ 0 8

149

161

138

150

162

Layout note:

Place one cap cl ose to every 2 pull -up resistors terminated to +VTT_ MEM

CLOSE TO SO-DIMM_0

1 . 8V	R 1 9 0	1 K _ 1 %_ 0 4		M V R E F _D I M0 _ 1
			R 1 89		C 4 0 7	C 4 0 9
			1 K _ 1 % _0 4		1 U _ 6 . 3 V _0 4	. 1U _ 10 V _ X 7 R _ 0 4

Diagrams

+C 3 85

C 4 2 8

C 41 6

C 4 1 3

C 4 1 7

C 4 27

C 41 5

C 4 2 5

C 4 12

1 . 8V

1 5 0 U _ 4 V _B 2

. 1U _ 10 V _ X 7R _ 04

. 1 U _1 0 V _ X7 R _0 4

. 1 U _ 1 0 V _X 7 R _ 0 4

. 1U _ 10 V _ X 7 R _ 0 4

. 1 U _1 0 V _ X 7R _ 04

. 1 U _ 1 0 V _X 7 R _ 0 4

. 1 U _ 1 0V _ X 7 R _ 0 4

. 1U _1 0 V _ X 7R _ 04

1. 8 V

+ C 4 3 7

+C 4 1 9

C 43 5

C 4 4 6

C 4 3 4

C 43 3

C 4 1 8

C 4 2 6

C 41 4

C 4 2 9

C 4 0 5

C 40 4

*1 50 U _4 V _ B 2

1 0 U _ 1 0V _0 8

1 0U _ 10 V _ 0 8

10 U _1 0 V _ 08

4 . 7 U _ 6 . 3 V _0 6

4 . 7U _ 6. 3 V _ 0 6

1U _ 6. 3 V _ 0 4

1 U _ 6 . 3 V _ 04

1 U _ 6 . 3V _0 4

. 22 U _1 6 V _ X 7R _ 06

. 2 2 U _ 1 6 V _X 7 R _ 0 6

2 20 U _4 V _ D 2

7 , 9 , 10 , 1 3 , 1 4, 1 6 , 3 7, 38		1 . 8 V
1 3,	38	V T T _ ME M
2, 3, 6 , 7 , 1 0, 13 , 1 4 , 15 , 2 2 , 2 3, 2 4 , 2 5 , 26 , 2 7 , 2 8, 2 9 , 3 0, 31 , 3 2 , 33 , 3 4 , 3 5, 3 9 , 4 1,	43	3 . 3 V S

D03B-0329

DDRII SO-DIMM - 0 B - 13