Cypress CY14B102N manual Advance, CY14E108L, CY14E108N, Switching Waveforms continued, + Feedback

Models: CY14E108N CY14B102N

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CE

ADVANCE

CY14E108L, CY14E108N

Switching Waveforms (continued)

Figure 8. SRAM Write Cycle #2: CE Controlled[13, 21, 22, 23]

ADDRESS

HIGH IMPEDANCE tSA No STORE occurswithout atleast one

CE

WE

BHE , BLE

DATA IN

DATA OUT

tWC

tSCE

tAW

tPWE

tBW

tSD

DATA VALID

HIGH IMPEDANCE

tVCCRISE tHA AutoStore

tHD

Figure 9. AutoStore or Power Up RECALL[24]

 

STORE occurs only

No STORE occurs

VCC

if a SRAM write

without atleast one

has happened

SRAM write

 

VSWITCH

 

tVCCRISE

 

AutoStore

tSTORE

tSTORE

POWER-UP RECALLtHRECALL

tHRECALL

Read & Write Inhibited

Note

24. Read and Write cycles are ignored during STORE, RECALL, and while VCC is below VSWITCH.

Document Number: 001-45524 Rev. *A

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Cypress CY14B102N Advance, CY14E108L, CY14E108N, Switching Waveforms continued, + Feedback, AutoStore, Address, Data Valid