Contents
CY14E108L, CY14E108N
Features
Logic Block Diagram
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12 Top View 13 not to scale
Pinouts
48-FBGA
9 44 - TSOP
CY14E108L, CY14E108N
Pin Definitions
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SRAM Write
Hardware RECALL Power Up
Device Operation
SRAM Read
ADVANCE
Software STORE
Software RECALL
Power
ADVANCE
Preventing AutoStore
Data Protection
Noise Considerations
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DC Electrical Characteristics
Maximum Ratings
Operating Range
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Capacitance
Thermal Resistance
AC Test Conditions
10. WE must be HIGH during SRAM read cycles
AC Switching Characteristics
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CY14E108L, CY14E108N
Hardware STORE Cycle
AutoStore and Power Up RECALL
Switching Waveforms
Software Controlled STORE and RECALL Cycle
Figure 7. SRAM Write Cycle #1 WE Controlled 13, 21, 22
Switching Waveforms continued
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CY14E108L, CY14E108N
CY14E108L, CY14E108N
Switching Waveforms continued
POWER-UP RECALL
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ADVANCE
Switching Waveforms continued
α α α α
α α α α α α
Figure 12. Hardware STORE Cycle20
Switching Waveforms continued
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CY14E108L, CY14E108N
Ordering Information
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CY14E108L, CY14E108N
CY14E108L, CY14E108N
Ordering Information continued
Part Numbering Nomenclature
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Figure 14. 44-Pin TSOP II
Package Diagrams
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CY14E108L, CY14E108N
Figure 15. 48-ball FBGA - 6 mm x 10 mm x 1.2 mm
Package Diagrams continued
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CY14E108L, CY14E108N
Figure 16. 54-Pin TSOP II
Package Diagrams continued
ADVANCE
CY14E108L, CY14E108N
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