Package Diagrams, Pin Tsop II | Cypress CY14B108M, CY14B108K

PRELIMINARY	CY14B108K, CY14B108M

Package Diagrams

	Figure 17.		44-Pin TSOP II (51-85087)
22	1	PIN 1 I.D.
22	1
	11.938 (0.470)	11.735 (0.462)	10.262 (0.404)	10.058 (0.396)
23	44

DIMENSION IN MM (INCH)

MAX

MIN.

O R E

K X A

S G

EJECTOR PIN

TOP VIEW

BOTTOM VIEW

0.800 BSC	0.400(0.016)
	0.300 (0.012)	BASE PLANE
(0.0315)

0° -5°

0.10 (.004)

18.517 (0.729)

18.313 (0.721)

(0.047)1.194	(0.039)0.991	(0.0059)0.150	(0.0020)0.050	SEATING

				PLANE

10.262 (0.404)

10.058 (0.396)

0.597 (0.0235)

0.406 (0.0160)

0.210 (0.0083)

0.120 (0.0047)

51-85087 *A

Document #: 001-47378 Rev. **

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Cypress CY14B108M, CY14B108K manual Package Diagrams, Pin Tsop II

Contents

Cypress Semiconductor Corporation FeaturesLogic Block Diagram1, 2 Functional Description Pinouts AutoStore Operation Device OperationSram Read Sram Write Software Store Hardware Recall Power UpHardware Store HSB Operation Software Recall Store Mode SelectionA15 A05 Mode Power Preventing AutoStore Noise Considerations Data Protection Best Practices Real Time Clock Operation Alarm Watchdog TimerCalibrating the Clock Flags Register Power MonitorInterrupt Register Interrupts AF Alarm Flag WDF Watchdog Timer FlagPF Power Fail Flag PFE Power Fail Enable Oscen WDSWDF Oscf For the register is 0 to 0xFFFF9 0x7FFF9 Time Keeping Seconds 0xFFFF6 0x7FFF6 Interrupt Status/Control 0xFFFF5 0x7FFF5 Alarm DayTime-base Write only. Reading it always returns a This condition and write 0 to clear this flag 0xFFFF2 0x7FFF2 Alarm SecondsCenturies 0xFFFF0 0x7FFF0 Flags Watchdog Operating Range DC Electrical CharacteristicsRange Ambient Temperature Maximum Ratings AC Test Conditions Data Retention and EnduranceCapacitance Thermal Resistance RTC Capacitor Pin Voltage TOCS RTC Oscillator Time to Start RTC Backup CurrentHot Temperature 85 oC RTC Battery Pin Voltage Sram Write Cycle AC Switching CharacteristicsSwitching Waveforms Parameters Sram Read Cycle Data Input Input Data Valid Data Output High Impedance Output Data ValidStandby Active Address Address Valid Data Input Input Data Valid High Impedance Data Output Data Input Data OutputInput Data Valid High Impedance Not applicable for RTC register writes Parameters Description 20 ns 25 ns 45 ns Unit Min Max AutoStore/Power Up Recall Software Controlled Store and Recall Cycle Hardware Store Pulse Width To Output Active Time when write latch not setHardware Store Cycle Description 20 ns 25 ns 45 ns Unit Min Truth Table For Sram Operations For x8 ConfigurationFor x16 Configuration Inputs and Outputs Mode Power Part Numbering Nomenclature CY14 B 108 K ZS P 20 X C T ZS TsopNvsram Ordering Information Pin Tsop II Package Diagrams 51-85160 Document History Sales, Solutions, and Legal InformationWorldwide Sales and Design Support Products PSoC Solutions New Data Sheet

Package Diagrams

44-Pin TSOP II (51-85087)

TOP VIEW

BOTTOM VIEW