Cypress CY62128EV30 manual Capacitance, Data Retention Characteristics, Thermal Resistance

Models: CY62128EV30

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Capacitance

CY62128EV30

Capacitance

(For all packages)[8]

Parameter

 

Description

Test Conditions

Max

 

 

Unit

CIN

 

Input Capacitance

TA = 25°C, f = 1 MHz,

10

 

 

 

pF

 

 

 

 

VCC = VCC(typ)

 

 

 

 

 

 

 

COUT

 

Output Capacitance

 

 

10

 

 

 

pF

Thermal Resistance

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Parameter

Description

 

Test Conditions

TSOP I

 

SOIC

 

STSOP

Unit

ΘJA

Thermal Resistance

 

Still Air, soldered on a 3 x 4.5 inch,

33.01

 

48.67

 

32.56

°C/W

 

(Junction to Ambient)

 

two-layer printed circuit board

 

 

 

 

 

 

 

ΘJC

Thermal Resistance

 

 

 

3.42

 

25.86

 

3.59

°C/W

 

(Junction to Case)

 

 

 

 

 

 

 

 

 

 

R1

VCC Thermal Resistance

Figure 1. AC Test Loads and Waveforms

ALL INPUT PULSES

OUTPUT Data Retention Characteristics

30 pF Manual background

INCLUDING

JIG AND

SCOPE

 

 

VCC

 

 

 

 

 

 

 

 

 

 

10%

 

 

 

 

 

90%

R2

 

 

 

 

 

 

 

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Rise Time = 1 V/ns

 

 

 

 

 

 

 

Equivalent to:

THEVENIN EQUIVALENT

OUTPUT

 

 

 

RTH

 

 

 

 

V

 

 

 

 

 

 

 

90%

10%

Manual background Fall Time = 1 V/ns

Parameters

2.50V

3.0V

Unit

R1

16667

1103

Ω

 

 

 

 

R2

15385

1554

Ω

 

 

 

 

RTH

8000

645

Ω

VTH

1.20

1.75

V

Data Retention Characteristics

(Over the Operating Range)

Parameter

Description

 

Conditions

 

Min

Typ[3]

Max

Unit

VDR

VCC for Data Retention

 

 

 

 

1.5

 

 

V

ICCDR[7]

Data Retention Current

VCC

= 1.5V,

 

Ind’l/Auto-A

 

 

 

3

μA

 

 

CE1

> VCC 0.2V or CE2

< 0.2V,

 

 

 

 

 

 

 

 

Auto-E

 

 

 

30

μA

 

 

VIN > VCC 0.2V or VIN < 0.2V

 

 

 

 

 

 

 

 

 

 

 

tCDR[8]

Chip Deselect to Data Retention

 

 

 

 

 

0

 

 

ns

 

Time

 

 

 

 

 

 

 

 

 

t [9]

Operation Recovery Time

 

 

 

 

t

RC

 

 

ns

R

 

 

 

 

 

 

 

 

 

Note

8.Tested initially and after any design or process changes that may affect these parameters.

9.Full device AC operation requires linear VCC ramp from VDR to VCC(min) > 100 μs or stable at VCC(min) > 100 μs.

Document #: 38-05579 Rev. *D

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Cypress CY62128EV30 manual Capacitance, Data Retention Characteristics, Thermal Resistance