CY7C027V/027VN/027AV/028V
CY7C037V/037AV/038V
Document #: 38-06078 Rev. *B Page 13 of 18
Note
34.If t
PS
is violated, the busy signal is asserted on one side or the other, but there is no guarantee to which side BUSY is asserted.
Switching Waveforms
(continued)
ADDRESS MATCH
t
PS
t
BLC
t
BHC
ADDRESS MATCH
t
PS
t
BLC
t
BHC
CER
Valid First :ADDRESS
L,R
BUSY
R
CE
L
CE
R
BUSY
L
CE
R
CE
L
ADDRESS
L,R
Figure 13. Busy Timing Diagram No. 1 (CE Arbitration)[34]
CEL
Valid First:ADDRESS MATCH
t
PS
ADDRESS
L
BUSY
R
ADDRESS MISMATCH
t
RC
ort
WC
t
BLA
t
BHA
ADDRESS
R
ADDRESS MATCH ADDRESS MISMATCH
t
PS
ADDRESS
L
BUSY
L
t
RC
ort
WC
t
BLA
t
BHA
ADDRESS
R
RightAddres sValid First:Figure 14. Busy Timing Diagram No. 2 (Address Arbitration)[34]
Left Address Valid First:[+] Feedback