Logic Block Diagram CY7C1292DV18, Doff

CY7C1292DV18

CY7C1294DV18

Logic Block Diagram (CY7C1292DV18)

D[17:0]

Address

A(17:0)

CLK

Gen.

DOFF

VREF

WPS

Control

BWS

Logic

[1:0]

Write

Address

Reg

Decode

256K x

Decode

Add.Write

18Array

Add.Read

Logic

Control

Read Data Reg.

Reg.

18A(17:0)

RPS

CCQ CQ

Q[17:0]

Logic Block Diagram (CY7C1294DV18)

D[35:0]

Address

A(16:0)

CLK

Gen.

DOFF

Write Add. Decode

Write	Write
Reg	Reg
128K x 36 Array	128K x 36 Array

Read Data Reg.

Read Add. Decode

Address Register

Control

Logic

17A(16:0)

RPS

C			CQ
C			CQ

VREF


WPS		Control
WPS		Control
BWS		Logic
BWS	[3:0]	Logic

72		36

						36

			Reg.		Reg.

	36




			Reg.
			Reg.

				36
				36

36Q[35:0]

Document #: 001-00350 Rev. *A

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Cypress manual Logic Block Diagram CY7C1292DV18, Logic Block Diagram CY7C1294DV18, Doff

Contents

Functional Description FeaturesConfigurations Selection Guide Doff Logic Block Diagram CY7C1292DV18Logic Block Diagram CY7C1294DV18 Q34 Pin Configurations Ball Fbga 13 x 15 x 1.4 mm PinoutTMS TDI Pin Definitions Functional Overview DLL RPS WPS Application Example1Write Cycle Descriptions CY7C1292DV18 2 BWS Write Cycle Descriptions CY7C1294DV18 2 Ieee 1149.1 Serial Boundary Scan Jtag Idcode TAP Controller State Diagram9 EXIT2-IR UPDATE-DR UPDATE-IR TAP Controller Block Diagram Parameter Description Test Conditions Min Max Unit Parameter Description Min Max Unit TAP AC Switching Characteristics Over the Operating Range13TAP Timing and Test Conditions13 Hold Times Instruction Codes Identification Register DefinitionsScan Register Sizes Register Name Bit Size Boundary Scan Order Bit # Bump ID Power-Up Sequence Power-Up Sequence in QDR-II SramPower-up Waveforms DLL Constraints Operating Range Electrical Characteristics Over the Operating Range12Maximum Ratings Capacitance Parameter Description Test Conditions Fbga Unit Thermal Resistance21AC Test Loads and Waveforms Test conditions follow standard test 28.51 Output Times Switching Characteristics Over the Operating Range22Set-up Times DLL Timing Write Read Switching Waveforms27, 28Read/Write/Deselect Sequence Write NOP Ordering Information Package Diagram PIN 1 Corner REV ECN No Issue Date Orig. Description of ChangeDocument History SYT