Cypress CY7C1292DV18, CY7C1294DV18 TAP AC Switching Characteristics , TAP Timing and Test Conditions

CY7C1292DV18
CY7C1294DV18
Document #: 001-00350 Rev. *A Page 13 of 23
TAP AC Switching Characteristics Over the Operating Range[13, 14]
Parameter Description Min. Max. Unit
tTCYC TCK Clock Cycle Time 50 ns
tTF TCK Clock Frequency 20 MHz
tTH TCK Clock HIGH 20 ns
tTL TCK Clock LOW 20 ns
Set-up Times
tTMSS TMS Set-up to TCK Clock Rise 5 ns
tTDIS TDI Set-up to TCK Clock Rise 5 ns
tCS Capture Set-up to TCK Rise 5 ns
Hold Times
tTMSH TMS Hold after TCK Clock Rise 5 ns
tTDIH TDI Hold after Clock Rise 5 ns
tCH Capture Hold after Clock Rise 5 ns
Output Times
tTDOV TCK Clock LOW to TDO Valid 10 ns
tTDOX TCK Clock LOW to TDO Invalid 0 ns
TAP Timing and Test Conditions[13]
Notes:
13.Test conditions are specified using the load in TAP AC test conditions. tR/tF = 1 ns.
14.tCS and tCH refer to the set-up and hold time requirements of latching data from the boundary scan register.
(a)
TDO
CL= 20 pF
Z0= 50Ω
GND
0.9V
50Ω
1.8V
0V
ALL INPUT PULSES
0.9V
Test Clock
Test Mode Select
TCK
TMS
Test Data-In
TDI
Test Data-Out
tTCYC
tTMSH
tTL
tTH
tTMSS
tTDIS tTDIH
tTDOV tTDOX
TDO
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