CY7C1292DV18

CY7C1294DV18

Switching Waveforms[27, 28, 29]

Read/Write/Deselect Sequence

READ

WRITE

READ

WRITE

READ

WRITE

NOP

1

2

3

4

5

6

7

WRITE NOP

8 9 10

K

tKH

K

RPS

WPS

A

A0

tSA

 

tKL

 

 

 

tCYC

 

 

tKHKH

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tSC tHC

A2

A3

tSA tHA

A6

D D10

D11

 

D30

D50

D51

 

 

 

 

tSD

 

tSD

tHD

Q

 

 

 

Q00

Q01

Q20

 

 

 

tCLZ

 

tCQDOH

 

 

 

 

 

tDOH

 

 

tKHCH

tKL

tCO

 

 

 

CtKH

tKHCH

tKHKH

 

tCYC

 

 

 

 

 

 

 

 

C

tCCQO

tCQOH

CQ

tCCQO

tCQOH

CQ

D61

Q21 Q40

tCQD

CARE

Q41

tCHZ

UNDEFINED

Notes:

27.Q00 refers to output from address A0. Q01 refers to output from the next internal burst address following A0, i.e., A0 + 1.

28.Output are disabled (High-Z) one clock cycle after a NOP.

29.In this example, if address A2 = A1,then data Q20 = D10 and Q21 = D11. Write data is forwarded immediately as read results. This note applies to the whole diagram.

Document #: 001-00350 Rev. *A

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Cypress CY7C1294DV18, CY7C1292DV18 manual Switching Waveforms27, 28, Read/Write/Deselect Sequence, Write Read, Write NOP