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Cypress Interrupt Timing Diagrams, CY7C132, CY7C136 CY7C136A, CY7C142, CY7C146, + Feedback

Models: CY7C132 CY7C142 CY7C136A CY7C136 CY7C146

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CY7C132, CY7C136

CY7C136A, CY7C142, CY7C146

Switching Waveforms (continued)

Interrupt Timing Diagrams [16]

Figure 12. Left Side Sets INTR

ADDRESSL

CEL

R/WL

INTR

	tWC
	WRITE 7FF
tINS	tHA
	tEINS
tSA	tWINS
	tWINS

Figure 13. Right Side Clears INTR

	tRC
ADDRESSR	READ 7FF
tHA	tINR
CER
tEINR
R/WR
OER	tOINR
	tOINR
INTR

Figure 14. Right Side Sets INTL

ADDRESSR

CER

R/WR

INTL

	tWC
	WRITE 7FE
tINS	tHA
	tEINS
tSA	tWINS

Figure 15. Right Side Clears INTL
	tRC
ADDRESSL	READ 7FE
tHA	tINR
CEL
tEINR
R/WL
OEL
	tOINR
INTL
Document #: 38-06031 Rev. *E	Page 11 of 15

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Cypress manual Interrupt Timing Diagrams, CY7C132, CY7C136 CY7C136A, CY7C142, CY7C146, Switching Waveforms continued

Contents

Functional Description FeaturesLogic Block Diagram CY7C132, CY7C136 CY7C136A, CY7C142, CY7C146Page 2 of PinoutsSelection Guide CY7C132, CY7C136 CY7C136A, CY7C142, CY7C146CY7C132, CY7C136 CY7C136A, CY7C142, CY7C146 Electrical CharacteristicsMaximum Ratings Operating RangeCY7C132, CY7C136 CY7C136A, CY7C142, CY7C146 Switching CharacteristicsCapacitance Interrupt Timing Switching CharacteristicsCY7C132, CY7C136 CY7C136A, CY7C142, CY7C146 Switching Characteristics CY7C132, CY7C136CY7C136A, CY7C142, CY7C146 CY7C136A, CY7C142, CY7C146 Switching WaveformsSwitching Characteristics CY7C132, CY7C136+ Feedback Switching Waveforms continuedCY7C132, CY7C136 CY7C136A, CY7C142, CY7C146 Figure 7. Write Cycle No.1 OE Three-States Data I/Os-Either Port 12Figure 8. Write Cycle No. 2 R/W Three-States Data I/Os-Either Port12 Switching Waveforms continuedFigure 9. Busy Timing Diagram No. 1 CE Arbitration CEL Valid First CY7C132, CY7C136 CY7C136A, CY7C142, CY7C146Left Address Valid First Switching Waveforms continuedFigure 10. Busy Timing Diagram No. 2 Address Arbitration CY7C132, CY7C136 CY7C136A, CY7C142, CY7C146Figure 12. Left Side Sets INTR Interrupt Timing DiagramsSwitching Waveforms continued CY7C132, CY7C136 CY7C136A, CY7C142, CY7C146+ Feedback Figure 16. Typical DC and AC CharacteristicsCY7C132, CY7C136 CY7C136A, CY7C142, CY7C146 CY7C132, CY7C136 CY7C136A, CY7C142, CY7C146 Ordering InformationFigure 18. 52-Pin Plastic Quad Flatpack Package DiagramsCY7C132, CY7C136 CY7C136A, CY7C142, CY7C146 Figure 17. 52-Pin Plastic Leaded Chip Carrierpsoc.cypress.com/solutions Sales, Solutions, and Legal InformationDocument History Page PSoC Solutions

Interrupt Timing Diagrams [16]

Figure 12. Left Side Sets INTR

Figure 13. Right Side Clears INTR

Figure 14. Right Side Sets INTL

Figure 15. Right Side Clears INTL