STK17TA8
Software-Controlled STORE/RECALL Cycle
In the following table, the software controlled STORE and RECALL cycle parameters are listed. [12, 13]
NO. |
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| Symbols |
| Parameter |
| Units | Notes | ||||||||
| E Cont |
| G Cont |
| Alternate |
| Min | Max |
| Min | Max | ||||||||
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26 | tAVAV | tAVAV |
| tRC |
| STORE / RECALL Initiation Cycle |
| 25 |
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| 45 |
| ns | 13 | |||||
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| Time |
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27 | tAVEL | tAVGL |
| tAS |
| Address |
| 0 |
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| 0 |
| ns |
| |||||
28 | tELEH | tGLGH |
| tCW |
| Clock Pulse Width |
| 20 |
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| 30 |
| ns |
| |||||
29 | tEHAX | tGHAX |
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| Address Hold Time |
| 1 |
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| 1 |
| ns |
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30 | tRECALL | tRECALL |
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| RECALL Duration |
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| 100 |
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| 100 | μs |
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| Figure 10. Software STORE/RECALL Cycle: |
| CONTROLLED[13] |
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| E |
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| 26 | 26 |
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| 27 | 28 |
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| 29 |
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| 23 | 30 |
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Figure 11. Software STORE/RECALL Cycle: G Controlled[13]
26 | 26 |
2728
23 30
29
Notes
12.The software sequence is clocked on the falling edge of E controlled READs or G controlled READs
13.The six consecutive addresses must be read in the order listed in the Software STORE/RECALL Mode Selection Table W must be high during all six consecutive cycles.
Document #: | Page 9 of 23 |
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