Dell M610 manual Model Speed Power Cache Cores

Dell™ PowerEdge™ M610 Technical Guidebook

B. Features

Key features of the 5500 series 2S processor (Nehalem EP) include:

•Four or two cores per processor

•Two point-to-point QuickPath Interconnect links at up to 6.4 GT/s

•1366-pin FC-LGA package

•45 nm process technology

•No termination required for non-populated CPUs (must populate CPU socket 1 first)

•Integrated three-channel DDR3 memory controller at up to 1333MHz

•Compatible with existing x86 code base

•MMX™ support

•Execute Disable Bit Intel Wide Dynamic Execution

•Executes up to four instructions per clock cycle

•Simultaneous Multi-Threading (Hyper-Threading) capability

•Support for CPU Turbo Mode (on certain SKUs)

•Increases CPU frequency if operating below thermal, power, and current limits

•Streaming SIMD (Single Instruction, Multiple Data) Extensions 2, 3, and 4

•Intel 64 Tecnology for Virtualization

•Intel VT-x and VT-d Technology for Virtualization

•Demand-based switching for active CPU power management as well as support for ACPI

P-States, C-States, and T-States

C.Supported Processors

model

speed

power

cache

cores

X5570	2.93GHz	95W	8M	4
X5560	2.80GHz	95W	8M	4
X5550	2.66GHz	95W	8M	4
E5540	2.53GHz	80W	8M	4
E5530	2.40GHz	80W	8M	4
E5520	2.26GHz	80W	8M	4
L5520	2.26GHz	60W	8M	4
E5506	2.13GHz	80W	4M	4
L5506	2.13GHz	60W	4M	4
E5504	2.00GHz	80W	4M	4
E5502	1.86GHz	80W	4M	2

D. Processor Configurations

Single CPU Configuration

The PowerEdge M610 is designed such that a single processor placed in the CPU1 socket will function normally, however PowerEdge M610 systems require a CPU blank in the CPU2 socket for thermal reasons. The system will be held in reset if a single processor is placed in the CPU2 socket.

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