Index (continued)

getTBU . . . . . . . . . . . . . . . . . . . 8-36HexToBin . . . . . . . . . . . . . . . . . 8-37InitBoard . . . . . . . . . . . . . . . . . . 8-31InitFifo. . . . . . . . . . . . . . . . . . . . 8-38Interact . . . . . . . . . . . . . . . . . . . 8-44invalidate_dcache. . . . . . . . . . . 8-33invalidate_icache . . . . . . . . . . . 8-33IsLegal. . . . . . . . . . . . . . . . . . . . 8-38IsPowerUp. . . . . . . . . . . . . . . . . 8-31KBHit. . . . . . . . . . . . . . . . . . . . . 8-31LongAddrTest . . . . . . . . . . . . . . 8-44Malloc . . . . . . . . . . . . . . . . . . . . 8-39MaskInts . . . . . . . . . . . . . . . . . . 8-35MemAdd. . . . . . . . . . . . . . . . . . 8-39MemBase . . . . . . . . . . . . . . . . . 8-31MemReset . . . . . . . . . . . . . . . . 8-39MemStats . . . . . . . . . . . . . . . . . 8-39MemTop . . . . . . . . . . . . . . . . . . 8-31NvHkOffset . . . . . . . . . . . . . . . . 8-32NvMonAddr . . . . . . . . . . . . . . . 8-32NvMonOffset . . . . . . . . . . . . . . 8-32NvMonSize . . . . . . . . . . . . . . . . 8-32NVOp . . . . . . . . . . . . . . . . . . . . 8-40NVRamAcc . . . . . . . . . . . . . . . . 8-32PingPongAddrTest . . . . . . . . . . 8-44probe . . . . . . . . . . . . . . . . . . . . 8-34put_c . . . . . . . . . . . . . . . . . . . . 8-42put_d . . . . . . . . . . . . . . . . . . . . 8-42putchar . . . . . . . . . . . . . . . . . . . 8-30ReAlloc . . . . . . . . . . . . . . . . . . . 8-39RKBHit . . . . . . . . . . . . . . . . . . . 8-31RotTest . . . . . . . . . . . . . . . . . . . 8-44RTxMT. . . . . . . . . . . . . . . . . . . . 8-31Seed . . . . . . . . . . . . . . . . . . . . . 8-42setMSR . . . . . . . . . . . . . . . . . . . 8-36SetNotPowerUp . . . . . . . . . . . . 8-31SetNvDefaults. . . . . . . . . . . . . . 8-40SetUnExpIntFunct. . . . . . . . . . . 8-33StrCat . . . . . . . . . . . . . . . . . . . . 8-43StrCmp . . . . . . . . . . . . . . . . . . . 8-43StrCpy . . . . . . . . . . . . . . . . . . . . 8-43StrLen . . . . . . . . . . . . . . . . . . . . 8-43TestSuite. . . . . . . . . . . . . . . . . . 8-44time_delay . . . . . . . . . . . . . . . . 8-31ToFifo . . . . . . . . . . . . . . . . . . . . 8-38tx_empty . . . . . . . . . . . . . . . . . 8-43TxMT. . . . . . . . . . . . . . . . . . . . . 8-31UnMaskInts. . . . . . . . . . . . . . . . 8-35VecInit . . . . . . . . . . . . . . . . . . . 8-33WordAddrTest . . . . . . . . . . . . . 8-44writeICTRL . . . . . . . . . . . . . . . . 8-36xprintf . . . . . . . . . . . . . . . . . . . . 8-45

xsprintf . . . . . . . . . . . . . . . . . . . 8-45

N

non-burst cycles . . . . . . . . . . . . . . . 4-4notation conventions . . . . . . . . . . . 1-6

number bases for monitor arguments . 8-6,8-7

numeric format . . . . . . . . . . . 8-6,8-7NVRAM default monitor configuration

8-2

P

P11/P12 signal descriptions . . . . . 7-10parity error signal, PCI . . . . . . . . . 7-11

PASS/FAIL power-up diagnostic flags . . 8-17

PCI9060ES. See PMC/PCI

PLX Mailbox 0 power-up diagnostic flags

8-17

PMC/PCI

bandwidth . . . . . . . . . . . . . . . . . 7-8

base address registers 7-2,7-4,7-5bus interface. . . . . . . . . . . . . . . . 7-8deadlocked cycle . . . . . . . . . . . . 7-6direct slave cycles . . . . . . . . . . . . 7-6EEPROM control register . . . . . . 7-4initialization . . . . . . . . . . . . . . . . 7-3interrupts . . . . . . . . . . . . . 7-8,7-10

local direct master cycles . . . . . . 7-6overview . . . . . . . . . . . . . . . 1-1,7-1PCI bridge . . . . . . . . . . . . . . . . . . 7-3phantom read. . . . . . . . . . . . . . . 7-7register map . . . . . . . . . . . . . . . . 7-1retry timers. . . . . . . . . . . . . . . . . 7-7

power requirements. . . . . . . . . . . . 2-6power-up

errors . . . . . . . . . . . . . . . . . . . . 8-29monitor sequence . . . . . . . . . . . 8-1

power-up diagnostics. . . . . . . . . . . 8-4test commands . . . . . . . . . . . . 8-17product ID. . . . . . . . . . . . . . . . . . . . 2-7product repair. . . . . . . . . . . . . . . . . 2-8protection circuitry. . . . . . . . . 6-1,6-4

protocols

HDLC . . . . . . . . . . . . . . . . . . . . . 5-4UART . . . . . . . . . . . . . . . . . . . . . 5-4

R

RAM

dual port. . . . . . . . . . . . . . . . . . . 5-3

overview. . . . . . . . . . . . . . . . . . . 1-1read cycle access time . . . . . . . . . . 4-3receive clock (RCLK) . . . . . . . . . . . . 6-3receive link (RLINK). . . . . . . . . . . . . 6-6receive link clock (RLCLK) . . . . . . . . 6-6receive serial (RSER) . . . . . . . . . . . . 6-4receive sync (RSYNC) . . . . . . . . . . . 6-4

references and manuals . . . . . . . . . 1-6register map for PCI9060ES . . . . . . 7-1register monitor commands . . . . 8-10registers

BCR. . . . . . . . . . . . . . . . . . . . . . . 4-3BRGC . . . . . . . . . . . . . . . . . . . . . 5-6

local configuration . . . . . . . . . . . 7-1PCI configuration . . . . . . . . . . . . 7-1shared runtime. . . . . . . . . . . . . . 7-3SICR . . . . . . . . . . . . . . . . . . . . . . 5-6SIMODE . . . . . . . . . . . . . . . . . . . 5-6

regulatory certifications. . . . . . . . . 1-4request signal, PCI . . . . . . . . . . . . 7-11

reset

monitor sequence . . . . . . . . . . . 8-1PCI signal . . . . . . . . . . . . . . . . . 7-11returning boards . . . . . . . . . . . . . . 2-8RISC controller . . . . . . . . . . . . . . . . 5-2RJ-45 jack . . . . . . . . . . . . . . . . . . . . 6-9RoHS. . . . . . . . . . . . . . . . . . . . . . . . 1-6

S

S0-records . . . . . . . . . . . . . . . . . .8-24S1-S3 data records . . . . . . . . . . . . 8-25S5 data records. . . . . . . . . . . . . . . 8-25

S7-S9 termination and start address records . . . . . . . . . . . . . . . . . . . . . 8-26screen messages . . . . . . . . . . . . . 8-28SDMA channels . . . . . . . . . . . . . . . 5-4

serial and version numbers. . . . . . . 2-7serial I/O

baud rate . . . . . . . . . . . . . . . . . . 5-6

control from the monitor . . . . . 8-43overview. . . . . . . . . . . . . . . . . . . 1-1protocols . . . . . . . . . . . . . . . . . . 5-4reference manuals . . . . . . . . . . . 1-7

serial management controller (SMC) . . 5-5

serial number . . . . . . . . . . . . . . . . . 2-7SERR* . . . . . . . . . . . . . . . . . . . . . . 7-11setup requirements . . . . . . . . . . . . 2-5SICR register . . . . . . . . . . . . . . . . . . 5-6SIMODE register . . . . . . . . . . . . . . . 5-6

specifications

10002367-02

PmT1 and PmE1 User’s Manual

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Emerson PMT1, PME1 user manual Index, Xsprintf

PMT1, PME1 specifications

The Emerson PME1 and PMT1 are advanced solutions in the realm of process management and automation, designed to enhance the efficiency and effectiveness of industrial operations. These devices play a crucial role in improving process control and providing comprehensive data analysis, which can lead to increased productivity and reduced operational costs.

The PME1 is characterized by its robust design and highly flexible architecture, allowing it to adapt to a variety of industrial environments. It integrates seamlessly with existing systems and offers advanced connectivity options to ensure that data flow is uninterrupted across different platforms. This feature is particularly important in modern industrial settings where data silos can inhibit operational efficiency.

The PMT1, on the other hand, focuses on real-time monitoring and telemetry. Its streamlined interface allows for quick access to key metrics, enabling operators to make informed decisions promptly. This is crucial in processes where timing is essential and minor delays can lead to significant financial losses. The PMT1 supports both wired and wireless communication protocols, ensuring that data is transmitted reliably irrespective of operational conditions.

One of the main features of both the PME1 and PMT1 is their integration of cutting-edge predictive analytics. With machine learning capabilities, these devices can analyze patterns and trends within the data, providing insights that can preemptively address potential issues before they escalate into significant problems. This predictive capability contributes to minimizing downtime and optimizing maintenance schedules, thus enhancing the overall lifecycle of equipment.

Another significant characteristic of the PME1 and PMT1 is their user-friendly interface. The intuitive design allows operators of all skill levels to navigate the systems with ease, minimizing training time and increasing overall productivity. With customizable dashboards, users can tailor their views to highlight the most relevant data for their specific operational needs.

In terms of security, both devices utilize advanced cybersecurity measures to protect sensitive data from unauthorized access. This is becoming increasingly important as industries rely more on digital solutions, and the potential risks associated with data breaches grow.

In summary, the Emerson PME1 and PMT1 are sophisticated tools designed for modern industrial applications, combining powerful features, advanced technologies, and essential characteristics. Their ability to provide real-time data analysis, ensure connectivity, and enhance predictive maintenance makes them invaluable for optimizing process management in various sectors. With a focus on user experience and data security, these devices are set to redefine efficiency and productivity in industrial operations.