Chapter2 Operating Principles
Rev. A 2-2
3
The reset circuit prevents the CPU from running away, which is caused by the unstable voltage in the
logic line during the power ON/OFF. Also, this circuit monitors level of power voltage at the overloading
or malfunction on the circuit and m anages the printer to operate normally, keeping the damage to t he
printer minimum during the abnor m al situations. On the C200 main board, 2 ICs are mount ed ; IC for
monitoring the voltage lev el (logic line) and IC for m oni toring the voltage level ( power l ine) and both
are monitored by the gate array and CPU.
The figure below shows reset circuit block diagram wit h ex planation on the next page.
[PST592(IC8)]
The actual operation of the circuit is to keep output t ing Low signal until +5V line goes up to +4.2V
when the power is on, and to cancel the reset signal with output of High signal when the voltage goes up
more than 4.2V.
[M51955(IC9)]
This IC also performs as monitor on the power line sam e as the r eset I C for logic described above.
High/Low is judged at the 33.2V.
[Relation between IC8 and IC9]
Reset signal which is low and output by IC9 is input to the CPU and gate array and system reset operation
is performed. Also, this signal is detected on t he IC9(IC for reset monitor, power line) and outputs the
same Low signal towards CPU/NMI terminal by being input t o NC5.
PST592D
(IC8)
Vcc
Vout
NRES
GND
+5V
C47
R138
+5V
R1
/RESET
TMP95C061
(IC1)
P85
E05B43
(IC2)
/RESET
176
30
16
1
2
3
4
M51955B
(IC9)
VCC
2
4
R6
+42V
R10
+5V
NC8
NC5
OUT
/NMI
10
P84
15
5
6
7
8
GND
IN
Figure 2-20. Reset Circuit Block Diagram