SED1520 Series
Set Column Address
This command specifies a column address of the display data RAM. When the display data RAM is accessed by the MPU continuously, the column address is incremented by 1 each time it is accessed from the set address. Therefore, the MPU can access to data continuously. The column address stops to be incremented at address 80, and the page address is not changed continuously.
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| A0 |
| RD |
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| WR | D7 |
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| D6 | D5 |
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| D4 |
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| D3 | D2 | D1 |
| D0 |
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| 0 | 1 |
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| A6 | A5 |
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| A4 |
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| A3 | A2 | A1 |
| A0 | 00H to 4FH | ||||
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This command loads the column address register. |
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| A6 A5 A4 | A3 | A2 | A1 | A0 |
| Column Address |
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| 0 | 0 | 0 | 0 | 0 |
| 0 | 0 |
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| 0 | 0 | 0 | 0 | 0 |
| 0 | 1 |
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| 1 | 0 | 0 | 1 | 1 |
| 1 | 1 |
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Read Status |
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| A0 |
| RD |
| WR | D7 |
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| D6 | D5 |
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| D3 | D2 | D1 |
| D0 |
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| 0 | 0 |
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| 1 |
| BUSY |
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| ADC | ON/OFF | RESET |
| 0 | 0 | 0 |
| 0 |
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Reading the command I/O register (A0=0) yields system status information.
• The busy bit indicates whether the driver will accept a command or not.
Busy=1: The driver is currently executing a command or is resetting. No new command will be accepted.
Busy=0: The driver will accept a new command.
•The ADC bit indicates the way column addresses are assigned to segment drivers. ADC=1: Normal. Column address n → segment driver n.
ADC=0: Inverted. Column address
•The ON/OFF bit indicates the current status of the display.
It is the inverse of the polarity of the display ON/OFF command.
ON/OFF=1: Display OFF
ON/OFF=0: Display ON
•The RESET bit indicates whether the driver is executing a hardware or software reset or if it is in normal operating mode. RESET=1: Currently executing reset command.
RESET=0: Normal operation
Write Display Data
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| R/W |
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A0 |
| RD |
| WR | D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 | ||
1 | 1 |
| 0 |
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| Write data | ||||||
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Writes
EPSON |