SED1520 Series
DC Characteristics (Cont’d)
Ta =
Parameter | Symbol |
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| Rating |
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| Applicable Pin |
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| Min. | Typ. | Max. |
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| VOLT |
| IOL = 3.0 mA |
| — | — | VSS+0.4 |
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| OSC2 |
| SED1520 | Series | |||
VOLC1 |
| IOL = 2.0 mA |
| — | — | VSS+0.4 | V |
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| See note 4 & 5. |
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| VOLC2 |
| IOL = 120 μA |
| — | — | 0.8×VSS |
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| VOLT |
| VSS = | IOL = 2 mA |
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| 0.8×VSS |
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| See note 4 & 5. |
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| VOLC1 |
| VSS = | IOL = 2 mA |
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| 0.8×VSS | V |
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| OSC2 |
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| VOLC2 |
| VSS = | IOL = 50 μA |
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| 0.8×VSS |
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Input leakage current | ILI |
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| — | 1.0 | μA |
| See note 6. |
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Output leakage current | ILO |
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| — | 3.0 | μA |
| See note 7. |
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| V5 = | — | 5.0 | 7.5 |
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| SEG0 to 79, |
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LCD driver ON resistance | RON |
| Ta = 25 deg. C |
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| kΩ |
| COM0 to 15, |
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| V5 = |
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| — | 10.0 | 50.0 |
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| See note 11 |
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Static current dissipation | IDDQ |
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| = CL = VDD |
| — | 0.05 | 1.0 | μA |
| VDD |
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| CS |
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| During display | fCL = 2 kHz | — | 2.0 | 5.0 |
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| VDD |
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| Rf = 1 MΩ | — | 9.5 | 15.0 | μA |
| See note 12, |
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| V5 = |
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| fCL = 18 kHz | — | 5.0 | 10.0 |
| 13 & 14. |
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| IDD (1) |
| During display | fCL = 2 kHz |
| 1.5 | 4.5 |
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| VDD |
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Dynamic current dissipation |
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| V5 = |
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| μA |
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| Rf = 1 MΩ |
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| See note 12 & 13. |
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| VSS = |
| 6.0 | 12.0 |
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| During access tcyc = 200 kHz | — | 300 | 500 |
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| IDD (2) |
| VSS = |
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| 150 | 300 | μA |
| See note 8. |
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| During access tcyc = 200 kHz |
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Input pin capacitance | CIN |
| Ta = 25 deg. C, f = 1 MHz | — | 5.0 | 8.0 | pF |
| All input pins |
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| Rf = 1.0 MΩ ±2%, | 15 | 18 | 21 |
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Oscillation frequency | fOSC |
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| kHz |
| See note 9. |
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| Rf = 1.0 MΩ ±2%, |
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| 11 | 16 | 21 |
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| VSS = |
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Reset time | tR |
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| 1.0 | — |
| μS |
| RES |
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| See note 15. |
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Notes: 1. Operation over the specified voltage range is guaranteed, except where the supply voltage changes suddenly during CPU access.
2.A0, D0 to D7, E (or RD), R/W (or WR) and CS
3.CL, FR, M/S and RES
4.D0 to D7
5.FR
6.A0, E (or RD), R/W (or WR), CS, CL, M/S and RES
7.When D0 to D7 and FR are high impedance.
8.During continual write acess at a frequency of tcyc. Current consumption during access is effectively proportional to the access frequency.
9.See figure below for details
10.See figure below for details
11. For a voltage differential of 0.1 V between input (V1, …, V 4) and output (COM, SEG) pins. All voltages within specified operating voltage range.
12.SED1520*A* and SED1521*A* and SED1522*A* only. Does not include transient currents due to stray and panel capacitances.
13.SED1520*0* and SED1522*0* only. Does not include transient currents due to stray and panel capacitances.
14.SED1521*0* only. Does not include transient currents due to stray and panel capacitances.
15.tR (Reset time) represents the time from the RES signal edge to the completion of reset of the internal circuit. Therefore, the SED1520 series enters the normal operation status after this tR.
EPSON |