Option ROM Mapping, PCI Interrupts, Link Layer

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HP 8000 tower manual Option ROM Mapping, PCI Interrupts, PCI Power Management Support, Link Layer, Physical Layer

Contents

Document Part Number Technical Reference GuideHP Compaq 8000 Elite Series Business Desktop Computers December First Edition December Document Part Number Technical Reference GuideHP Compaq 8000 Elite Series Business Desktop Computers 2 System Overview Contents1 Introduction 5 Input/Output Interfaces 3 Processor/Memory Subsystem4 System Support 7 Power and Signal Distribution 6 Integrated Graphics Subsystem 8 SYSTEM BIOS A Error Messages and Codes Index 1.2 Additional Information Sources Introduction1.1 About this Guide 1.1.1 Online Viewing 1.4.1 Special Notices 1.3 Serial Number1.4 Notational Conventions 1.4.2 Values Acronym or 1.5 Common Acronyms and AbbreviationsAcronyms and Abbreviations Abbreviation Table 1-1 Continued Acronym or Table 1-1 ContinuedAcronyms and Abbreviations Abbreviation Acronym or Table 1-1 ContinuedAcronyms and Abbreviations Abbreviation Acronym or Table 1-1 ContinuedAcronyms and Abbreviations Abbreviation Acronym or Table 1-1 ContinuedAcronyms and Abbreviations Abbreviation Acronym or 1-10 System Overview 2.1 Introduction 2.2 Features Feature Differences by Form Factor USDT 2.3 System Architecture Architectural Differences by Form Factor System Overview Chipset Components and Functionality 2.3.1 Intel Processor Support2.3.2 Chipset Support Component Functions 2.3.3 Support Components2.3.4 System Memory 2.3.7 Universal Serial Bus Interface 2.3.5 Mass Storage2.3.6 Serial Interface 2.3.8 Network Interface Controller Integrated Graphics Subsystem Statistics 2.3.9 Graphics Subsystem2.3.10 Audio Subsystem Environmental Specifications Factory Configuration 2.4 Specifications2.3.11 HP ProtectTools Embedded Security Power Supply Electrical Specifications Physical Specifications 2-12 Processor/Memory Subsystem 3.1 Introduction 3.2 Intel Processors 3.2.1 Intel Processor Overview 3.2.2 Processor Changing/Upgrading Supported Processors partial listing 3.3 Memory Subsystem Memory Socket Loading 3.3.1 Memory Upgrading3.3.2 Memory Mapping and Pre-allocation Base Memory Figure 3-2. System Memory Map for maximum of 8 gigabytesExpansion Area 4.2 PCI Bus Overview System Support4.1 Introduction 4.2.1 PCI 2.3 Bus Operation System Support PCI Component Configuration AccessWired to PCI Bus Transaction Protocol Layer 4.2.2 PCI Express Bus OperationSoftware/Driver Layer PCI Bus Mastering Devices 4.2.4 PCI Interrupts 4.2.5 PCI Power Management Support4.2.3 Option ROM Mapping Link Layer PCI 2.3 Bus Connector Pinout 4.2.6 PCI ConnectorsPCI 2.3 Connector Figure 4-2. 32-bit, 5.0-volt PCI 2.3 Bus Connector Figure 4-3. PCIe Bus Connectors PCIe ConnectorsPCIe Bus Connector Pinout 8259 Mode 4.3 System Resources4.3.1 Interrupts APIC Mode 4.3.2 Direct Memory Access PCI Interrupt Distribution 4.4 Real-Time Clock and Configuration Memory 4.4.1 Clearing CMOS 4.5.1 Security Functions 4.5 System Management4.4.2 Standard CMOS Locations Configuration Memory CMOS Map Cable Lock Provision Power-On / Setup PasswordSetup Password I/O Interface Security ACPI Wake-Up Events 4.5.2 Power ManagementSmart Cover Lock Optional System Operational Status LED Indications 4.5.3 System Status4.5.4 Thermal Sensing and Cooling 4.6 Register Map and Miscellaneous Functions 4.6.1 System I/O Map Function System I/O MapI/O Port SIO Controller Functions 4.6.2 GPIO FunctionsICH10 Functions Input/Output Interfaces 5.1 Introduction 5.2 SATA/eSATA Interfaces 5.2.1 SATA interface 5.2.2 eSATA interface 5.3 Serial Interface DB-9 Serial Connector Pinout 5.4.2 Enhanced Parallel Port Mode 5.4 Parallel Interface Support5.4.1 Standard Parallel Port Mode 5.4.3 Extended Capabilities Port Mode e w q - 9 8 7 6 5 4 3 2 1 g f d s a p o i u y t r 5.4.4 Parallel Interface ConnectorDB-25 Parallel Connector Pinout 5.5 Keyboard/Pointing Device Interface 5.5.1 Keyboard Interface Operation Keyboard/Pointing Device Connector Pinout 5.5.3 Keyboard/Pointing Device Interface Connector5.5.2 Pointing Device Interface Operation 5.6.1 USB Connector 5.6 Universal Serial Bus Interface USB Cable Length Data 5.6.2 USB Cable DataUSB Connector Pinout USB Color Code 5.7 Audio Subsystem Figure 5-8. Audio Subsystem Functional Block Diagram 5.7.3 Audio Multistreaming 5.7.1 HD Audio Controller5.7.2 HD Audio Link Bus HD Audio Subsystem Specifications 5.7.4 Audio SpecificationsThe specifications for the HD Audio subsystem are listed in Table 5.8 Network Interface Controller 5.8.2 Alert Standard Format Support 5.8.3 Power Management Support5.8.1 Wake-On-LAN Support Table 5-11. NIC Specifications 5.8.4 NIC Connector5.8.5 NIC Specifications Integrated Graphics Subsystem 6.1 Introduction 6.2 Functional Description Maximum Memory Allocation SDRAM InstalledGMA 4500 Memory Allocation 6.3 Display Modes 6.4 Upgrading 6.5 Monitor Connectors 6.5.1 Analog Monitor Connector 6.5.2 DisplayPort Connector Figure 6-3. DisplayPort Connector, as viewed from rear of chassis Integrated Graphics Subsystem 7.1 Introduction Power and Signal Distribution7.2 USDT Power Distribution USDT 135-Watt Power Supply Unit Specifications 7.3 SFF/CMT Power DistributionTable 7-1 lists the specifications of the external supply Figure 7-2. SFF/CMT Power Distribution and Cabling, Block Diagram SFF 240-Watt Power Supply Unit Specifications CMT 320-Watt Power Supply Unit Specifications 7.4 Power Control 7.4.1 Power Button Power failure power supply is overloaded. Check storage Power LED IndicationsPower LED Pre-video memory error. Incompatible or incorrectly seated Power Management Event 7.5 Power Management7.4.2 Wake Up Events Wake-On-LAN Power System Power StatesPower State Designator 7.6 Signal DistributionSystem Board Connector, Indicator, and Switch Designations Component function Figure 7-3. System Board Header Pinouts Figure 7-5 shows pinouts of headers used on the sytem boardsTable 7-7. Continued 7-10 System BIOS 8.1 Introduction 8.2.2 Changeable Splash Screen 8.2 ROM Flashing8.2.1 Upgrading 8.3.2 Network Boot F12 Support 8.3 Boot Functions8.3.1 Boot Device Order 8.3.3 Memory Detection and Configuration 8.3.4 Boot Error Codes 8.4 Client Management Functions System ID Numbers 8.4.1 System ID and ROM Type8.4.2 Temperature Status 8.5 SMBIOS SMBIOS Functions 8.6 USB Legacy Support 8.7 Management Engine Functions A.1 Introduction Error Messages and CodesA.2 Beep/Power LED Codes A.3 Power-On Self Test POST Messages Error Messages and Codes 1794--Inaccessible device attached to SATA Power-On Self Test POST MessagesError Message 1796-SATA Cabling Error 1801-Microcode Patch Error A.4 System Error Messages Error Messages and Codes Table A-4 A.5 Memory Error MessagesMemory Error Messages Table A-4. Continued A.6 Keyboard Error MessagesMemory Error Messages Message Int. test, LpBk. test., and data register failed A.7 Printer Error MessagesA.8 Video Graphics Error Messages Int. test, LpBk. test., and cntrl. register failed A.9 Diskette Drive Error Messages A.10 Serial Interface Error Messages Table A-9 Serial Interface Error Messages A.11 Modem Communications Error Messages Table A-10 Modem Communications Error Messages A.12 System Status Error Messages A.13 Hard Drive Error Messages Cntlr. failed to deallocate bad sectors xx = 00, Hard drive ID test xx = 01, Hard drive format test A.14 Hard Drive Error Messages EGA Mono. graphics mode test failed A.15 Video Graphics Error MessagesA.16 Audio Error Messages Lightpen graphics test failed, no resp A.17 DVD/CD-ROM Error Messages A.18 Network Interface Error Messages Probable Cause A.19 SCSI Interface Error Messages 65xx-xx, 66xx-xxMessage A.20 Pointing Device Interface Error Messages 8601-xx A-20 Index Numerics