PCI Express Bus Operation, Software/Driver Layer | HP 8000 tower

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HP 8000 tower PCI Express Bus Operation, Software/Driver Layer, Transaction Protocol Layer, PCI Bus Mastering Devices

Contents

HP Compaq 8000 Elite Series Business Desktop Computers Technical Reference GuideDocument Part Number December HP Compaq 8000 Elite Series Business Desktop Computers Technical Reference GuideFirst Edition December Document Part Number 1 Introduction Contents2 System Overview 4 System Support 3 Processor/Memory Subsystem5 Input/Output Interfaces 6 Integrated Graphics Subsystem 7 Power and Signal Distribution A Error Messages and Codes Index 8 SYSTEM BIOS 1.1 About this Guide Introduction1.2 Additional Information Sources 1.1.1 Online Viewing 1.4 Notational Conventions 1.3 Serial Number1.4.1 Special Notices 1.4.2 Values Acronyms and Abbreviations 1.5 Common Acronyms and AbbreviationsAcronym or Abbreviation Table 1-1 Continued Acronyms and Abbreviations Table 1-1 ContinuedAcronym or Abbreviation Acronyms and Abbreviations Table 1-1 ContinuedAcronym or Abbreviation Acronyms and Abbreviations Table 1-1 ContinuedAcronym or Abbreviation Acronyms and Abbreviations Table 1-1 ContinuedAcronym or Abbreviation Acronyms and Abbreviations 1-10 2.1 Introduction System Overview 2.2 Features USDT Feature Differences by Form Factor Architectural Differences by Form Factor 2.3 System Architecture Technical Reference Guide 2.3.2 Chipset 2.3.1 Intel Processor SupportChipset Components and Functionality 2.3.4 System Memory 2.3.3 Support ComponentsSupport Component Functions 2.3.6 Serial Interface 2.3.5 Mass Storage2.3.7 Universal Serial Bus Interface 2.3.8 Network Interface Controller 2.3.10 Audio Subsystem 2.3.9 Graphics SubsystemIntegrated Graphics Subsystem Statistics 2.3.11 HP ProtectTools Embedded Security 2.4 SpecificationsEnvironmental Specifications Factory Configuration Physical Specifications Power Supply Electrical Specifications 2-12 3.1 Introduction Processor/Memory Subsystem 3.2.1 Intel Processor Overview 3.2 Intel Processors Supported Processors partial listing 3.2.2 Processor Changing/Upgrading 3.3 Memory Subsystem 3.3.2 Memory Mapping and Pre-allocation 3.3.1 Memory UpgradingMemory Socket Loading Expansion Area Figure 3-2. System Memory Map for maximum of 8 gigabytesBase Memory 4.1 Introduction System Support4.2 PCI Bus Overview 4.2.1 PCI 2.3 Bus Operation Wired to PCI Component Configuration AccessSystem Support PCI Bus Software/Driver Layer 4.2.2 PCI Express Bus OperationTransaction Protocol Layer PCI Bus Mastering Devices 4.2.3 Option ROM Mapping 4.2.5 PCI Power Management Support4.2.4 PCI Interrupts Link Layer PCI 2.3 Connector 4.2.6 PCI ConnectorsPCI 2.3 Bus Connector Pinout Figure 4-2. 32-bit, 5.0-volt PCI 2.3 Bus Connector PCIe Bus Connector Pinout PCIe ConnectorsFigure 4-3. PCIe Bus Connectors 4.3.1 Interrupts 4.3 System Resources8259 Mode APIC Mode PCI Interrupt Distribution 4.3.2 Direct Memory Access 4.4.1 Clearing CMOS 4.4 Real-Time Clock and Configuration Memory 4.4.2 Standard CMOS Locations 4.5 System Management4.5.1 Security Functions Configuration Memory CMOS Map Setup Password Power-On / Setup PasswordCable Lock Provision I/O Interface Security Smart Cover Lock Optional 4.5.2 Power ManagementACPI Wake-Up Events 4.5.4 Thermal Sensing and Cooling 4.5.3 System StatusSystem Operational Status LED Indications 4.6.1 System I/O Map 4.6 Register Map and Miscellaneous Functions I/O Port System I/O MapFunction ICH10 Functions 4.6.2 GPIO FunctionsSIO Controller Functions 5.1 Introduction Input/Output Interfaces 5.2.1 SATA interface 5.2 SATA/eSATA Interfaces 5.2.2 eSATA interface DB-9 Serial Connector Pinout 5.3 Serial Interface 5.4.1 Standard Parallel Port Mode 5.4 Parallel Interface Support5.4.2 Enhanced Parallel Port Mode 5.4.3 Extended Capabilities Port Mode DB-25 Parallel Connector Pinout 5.4.4 Parallel Interface Connectore w q - 9 8 7 6 5 4 3 2 1 g f d s a p o i u y t r 5.5.1 Keyboard Interface Operation 5.5 Keyboard/Pointing Device Interface 5.5.2 Pointing Device Interface Operation 5.5.3 Keyboard/Pointing Device Interface ConnectorKeyboard/Pointing Device Connector Pinout 5.6 Universal Serial Bus Interface 5.6.1 USB Connector USB Connector Pinout 5.6.2 USB Cable DataUSB Cable Length Data USB Color Code Figure 5-8. Audio Subsystem Functional Block Diagram 5.7 Audio Subsystem 5.7.2 HD Audio Link Bus 5.7.1 HD Audio Controller5.7.3 Audio Multistreaming The specifications for the HD Audio subsystem are listed in Table 5.7.4 Audio SpecificationsHD Audio Subsystem Specifications 5.8 Network Interface Controller 5.8.1 Wake-On-LAN Support 5.8.3 Power Management Support5.8.2 Alert Standard Format Support 5.8.5 NIC Specifications 5.8.4 NIC ConnectorTable 5-11. NIC Specifications 6.1 Introduction Integrated Graphics Subsystem 6.2 Functional Description GMA 4500 Memory Allocation SDRAM InstalledMaximum Memory Allocation 6.3 Display Modes 6.4 Upgrading 6.5.1 Analog Monitor Connector 6.5 Monitor Connectors Figure 6-3. DisplayPort Connector, as viewed from rear of chassis 6.5.2 DisplayPort Connector Technical Reference Guide 7.2 USDT Power Distribution Power and Signal Distribution7.1 Introduction Table 7-1 lists the specifications of the external supply 7.3 SFF/CMT Power DistributionUSDT 135-Watt Power Supply Unit Specifications Figure 7-2. SFF/CMT Power Distribution and Cabling, Block Diagram CMT 320-Watt Power Supply Unit Specifications SFF 240-Watt Power Supply Unit Specifications 7.4.1 Power Button 7.4 Power Control Power LED Power LED IndicationsPower failure power supply is overloaded. Check storage Pre-video memory error. Incompatible or incorrectly seated 7.4.2 Wake Up Events 7.5 Power ManagementPower Management Event Wake-On-LAN Power System Power StatesPower State System Board Connector, Indicator, and Switch Designations 7.6 Signal DistributionDesignator Component function Table 7-7. Continued Figure 7-5 shows pinouts of headers used on the sytem boardsFigure 7-3. System Board Header Pinouts 7-10 8.1 Introduction System BIOS 8.2.1 Upgrading 8.2 ROM Flashing8.2.2 Changeable Splash Screen 8.3.1 Boot Device Order 8.3 Boot Functions8.3.2 Network Boot F12 Support 8.3.3 Memory Detection and Configuration 8.3.4 Boot Error Codes 8.4 Client Management Functions 8.4.2 Temperature Status 8.4.1 System ID and ROM TypeSystem ID Numbers SMBIOS Functions 8.5 SMBIOS 8.7 Management Engine Functions 8.6 USB Legacy Support A.2 Beep/Power LED Codes Error Messages and CodesA.1 Introduction Error Messages and Codes A.3 Power-On Self Test POST Messages Error Message Power-On Self Test POST Messages1794--Inaccessible device attached to SATA 1796-SATA Cabling Error 1801-Microcode Patch Error Error Messages and Codes A.4 System Error Messages Memory Error Messages A.5 Memory Error MessagesTable A-4 Memory Error Messages A.6 Keyboard Error MessagesTable A-4. Continued Message A.8 Video Graphics Error Messages A.7 Printer Error MessagesInt. test, LpBk. test., and data register failed Int. test, LpBk. test., and cntrl. register failed A.9 Diskette Drive Error Messages Table A-9 Serial Interface Error Messages A.10 Serial Interface Error Messages Table A-10 Modem Communications Error Messages A.11 Modem Communications Error Messages A.12 System Status Error Messages Cntlr. failed to deallocate bad sectors A.13 Hard Drive Error Messages xx = 00, Hard drive ID test xx = 01, Hard drive format test A.14 Hard Drive Error Messages A.16 Audio Error Messages A.15 Video Graphics Error MessagesEGA Mono. graphics mode test failed Lightpen graphics test failed, no resp A.18 Network Interface Error Messages A.17 DVD/CD-ROM Error Messages Message A.19 SCSI Interface Error Messages 65xx-xx, 66xx-xxProbable Cause A.20 Pointing Device Interface Error Messages 8601-xx A-20 Numerics Index