2.4.12TFT Panel Connector (CN3)
Signal | PIN | PIN | Signal |
ENBLK | 39 | 40 | NC |
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M | 37 | 38 | LP |
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SHFCLK | 35 | 36 | FLM |
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GND | 33 | 34 | GND |
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P22 | 31 | 32 | P23 |
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P20 | 29 | 30 | P21 |
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P18 | 27 | 28 | P19 |
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P16 | 25 | 26 | P17 |
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P14 | 23 | 24 | P15 |
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P12 | 21 | 22 | P13 |
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P10 | 19 | 20 | P11 |
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P8 | 17 | 18 | P9 |
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P6 | 15 | 16 | P7 |
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P4 | 13 | 14 | P5 |
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P2 | 11 | 12 | P3 |
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P0 | 9 | 10 | P1 |
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VCON | 7 | 8 | GND |
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+3.3V | 5 | 6 | +3.3V |
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GND | 3 | 4 | GND |
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+5V | 1 | 2 | +5V |
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2.4.12.1 Signal Description – TFT Panel Connecter (CN3)
Signal | Description |
P [0:23] | Flat panel data output for 18/24 bit TFT flat panels. Refer to table below for |
| configurations for various panel types. The flat panel data and control outputs are |
| all |
SHFCLK | Shift Clock. Pixel clock for flat panel data |
LP | Flat panel equivalent of HSYNC (horizontal synchronization) |
FLM | Flat panel equivalent of VSYNC (vertical synchronization) |
M | Multipurpose signal, function depends on panel type. May be used as AC drive |
| control signal or as BLANK# or Display Enable signal |
ENBKL | Enable backlight signal. This signal is controlled as a part of the panel power |
| sequencing |
ENVEE | Enable VEE. Signal to control the panel |
| turn on the VEE (LCD bias voltage) supply to the panel |
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