ECM-5510 2.4.19.1.6Interrupts

 

Signal

 

 

Signal Description

 

 

 

 

 

IRQ[3:7], IRQ[9:12]

 

These signals are active

high

signals, which

indicate

the

presence

of an

 

 

interrupting PC-AT/PC104

bus

adapter. Due to

the use

of

pull-ups,

unused

 

IRQ[14:15]

 

 

 

interrupt inputs must be masked.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2.4.19.1.7Bus Arbitration

 

Signal

 

Signal Description

 

 

 

These signals are active high signals driven by a DMA bus adapter to indicate a

 

 

 

request for a DMA bus operation. DRQ [0:3] request 8 bit DMA operations, while

 

DRQ[0:3], DRQ[5:7]

 

DRQ [5:7] request 16 bit operations. All bus DMA adapters will drive these lines

 

 

 

with a tri-state driver. The permanent master monitors these signals to determine

 

 

 

which of the DMA devices, if any, are requesting the bus.

 

DACK[0:3]#,

 

These signals are active low signals driven by the permanent master to indicate

 

 

that a DMA operation can begin. They are continuously driven by a totem pole

 

DACK[5:7]#

 

 

 

driver for DMA channels attached.

 

 

 

 

 

 

 

 

 

 

This signal is an active high totem pole signal driven by the permanent master to

 

 

 

indicate that the address lines are driven by the DMA controller. The assertion of

 

AEN

 

AEN disables response to I/O port addresses when I/O command strobes are

 

 

 

asserted. AEN being asserted, only the device with active DACKn# should

 

 

 

respond.

 

REFRESH#

 

This is an active low signal driven by the current master to indicate a memory

 

 

refresh operation. The current master will drive this line with a tri-state driver.

 

 

 

 

 

 

 

 

 

 

This active high signal is asserted during a read or write command indicating that

 

TC

 

the DMA controller has reached a terminal count for the current transfer. DACKn#

 

 

 

must be presented by the bus adapter to validate the TC signal.

 

MASTER#

 

This signal is not supported by the chipset.

 

 

 

 

48 ECM-5510 User’s Manual