IBM manual The z890 supports LPAR mode only basic mode is no longer supported

ups and operations. Any unused PUs can be utilized as spares. The inactive PUs on the MCM are available to be characterized as either Central Processors (CPs), Internal Coupling Facility (ICF) processors for Coupling Facility applications, Integrated Facility Linux (IFL) for Linux appli- cations, or as IBM ^zSeries Application Assist Processor (zAAP) engines, providing enterprises with tre- mendous fl exibility in confi guring the best system for run- ning applications. Each model of the z890 must always be ordered with at least one CP, IFL or ICF.

The PU, which uses the latest chip technology from IBM semiconductor laboratories, is built on CMOS 9S-SOI with copper interconnections. The 14.1 mm x 18.9 mm chip has a cycle time of 1.0 nanoseconds and is identical to the z990 PU except for the cycle time. Implemented on this chip are leading edge functions as the z/Architecture with its 64-bit capabilities including instructions, 64-bit General Purpose Registers, SuperScalar function, translation facili- ties, ability to use long displacement operations and on board Cryptographic Assist functions.

The z890 is a single book design. The book can support up to 32 GB of memory on a single memory card and 8 Self-Timed Interconnects (STIs) for I/O Connectivity. The memory which can be purchased in 8 GB increments, is delivered on 8 GB, 16 GB or 32 GB cards. The minimum memory is 8 GB. The book has a 2 Memory Bus Adapters (MBAs) and each MBA supports 4 STIs.

The z890 supports LPAR mode only (basic mode is no longer supported).

The MultiChip Module (MCM) is the technology corner- stone for fl exible PU deployment in the z890 models. For most models, the ability of the MCM to have inactive PUs allows such features as Capacity Upgrade on Demand

(CUoD), Customer Initiated Upgrades (CIU), and the ability to add CPs, ICFs, IFLs and zAAPs dynamically provid- ing nondisruptive upgrade of processing capability. Also, the ability to add CPs lets a z890 with spare PU capacity become a backup for other systems in the enterprise; expanding the z890 system to meet an emergency outage situation. This is called Capacity BackUp (CBU).

The I/O SubSystem has been enhanced to support two Logical Channel SubSystems (LCSSs) which provide the capability to defi ne up to 512 CHPIDs (256 CHPIDs per operating system image). I/O improvements in the Parallel Sysplex Coupling Link architecture and technology sup- port faster and more effi cient transmission between the Coupling Facility and production systems. HiperSockets™ provides high-speed capability to communicate among virtual servers and Logical Partitions; this is based on high-speed TCP/IP memory speed transfers and provides value in allowing applications running in one partition to communicate with applications running in another without dependency on an external network. Industry standard and openness are design objectives for I/O in z890. The improved I/O subsystem is delivering new horizons in I/O capability and has eliminated the 256 limit to I/O attach- ments for a mainframe.

9