PCI Bus

The PCI bus originates in the chip set. Features of the PCI bus are:

Integrated arbiter with multitransaction PCI arbitration acceleration hooks

Zero-wait-state, microprocessor-to-PCI write interface for high-performance graphics

Built-in PCI bus arbiter

Microprocessor-to-PCI memory write posting

Conversion of back-to-back, sequential, microprocessor-to-PCI memory write to PCI burst write

Delayed transaction

PCI parity checking and generation support

IDE bus master interface

The system board incorporates a PCI-to-IDE interface that complies with the AT Attachment Interface with Extensions.

The bus master for the IDE interface is integrated into the I/O hub of the

chip set. The chip set is PCI 2.2 compliant. It connects directly to the PCI bus and is designed to allow concurrent operations on the PCI bus and IDE bus. The chip set is capable of supporting PIO mode 0–4 devices and IDE DMA mode 0–3 devices. Ultra DMA 66 transfers up to 66 Mbps using an ATA 66 cable.

The IDE devices receive their power through a four-position power cable containing +5 V dc, +12 V dc, and ground voltage. As devices are added to the IDE interface, designate one device as the master, or primary, device and another as the slave, or subordinate, device. These designations are determined by switches or jumpers on each device. There are two IDE ports, one designated Primary and the other Secondary, allowing for up to four devices to be attached. The total number of physical IDE devices is determined by available space on the system board.

For the IDE interface, no resource assignments are given in the system memory or the direct memory access (DMA) channels. For information on the resource assignments, see “Input/output address map” on page 48 and “Appendix C. IRQ and DMA channel assignments,” on page 53.

For information on the connector pin assignments, see “IDE connectors” on page 42.

USB interface

Universal Serial Bus (USB) technology is a standard feature of your personal computer. The system board provides the USB interface with two connectors integrated into the chip set. A USB-enabled device can attach to a connector and, if that device is a hub, multiple peripheral devices can attach to the hub and be used by the system. The USB connectors use Plug and Play technology for installed devices. The speed of the USB is up to 12 MBps with a maximum of 127 peripheral devices. The USB is compliant with Universal Host Controller Interface Guide 1.0.

Features of USB technology include:

Plug and Play devices

Concurrent operation of multiple devices

Suitability for different device bandwidths

Chapter 2. System board features 7

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IBM PC 300GL manual PCI Bus, IDE bus master interface, USB interface